公开(公告)号：US08791444B2

公开(公告)日：2014-07-29

申请号：US13304085

申请日：2011-11-23

申请人： Albert Chin ,  Chun-Hu Cheng

发明人： Albert Chin ,  Chun-Hu Cheng

IPC分类号： H01L47/00

CPC分类号： H01L45/04 ,  B82Y10/00 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/1641

摘要： Resistive random access memory (RRAM) using stacked dielectrics and a method for manufacturing the same are disclosed, where a setting power of only 4 μW, an ultra-low reset power of 2 nW, good switching uniformity and excellent cycling endurance up to 5×109 cycles were achieved simultaneously. Such record high performances were reached in a Ni/GeOx/nano-crystal-TiO2/TaON/TaN RRAM device, where the excellent endurance is 4˜6 orders of magnitude larger than existing Flash memory. The very long endurance and low switching energy RRAM is not only satisfactory for portable SSD in a computer, but may also create new applications such as being used for a Data Center to replace high power consumption hard discs.

摘要翻译： 公开了使用堆叠电介质的电阻随机存取存储器（RRAM）及其制造方法，其中设置功率仅为4μW，超低复位功率为2nW，良好的开关均匀性和优异的循环耐受性高达5× 同时实现了109个循环。 在Ni / GeOx /纳米晶体TiO2 / TaON / TaN RRAM器件中达到了这样的高性能，其耐久性比现有闪存大4〜6个数量级。 非常长的耐用性和低开关能量RRAM不仅对于计算机中的便携式SSD是令人满意的，而且还可以创建新的应用，例如用于数据中心来替代高功率硬盘。

公开(公告)号：US08470659B2

公开(公告)日：2013-06-25

申请号：US13595599

申请日：2012-08-27

申请人： Liang-Gi Yao ,  Chun-Hu Cheng ,  Chen-Yi Lee ,  Jeff J. Xu ,  Clement Hsingjen Wann

发明人： Liang-Gi Yao ,  Chun-Hu Cheng ,  Chen-Yi Lee ,  Jeff J. Xu ,  Clement Hsingjen Wann

IPC分类号： H01L21/8249

CPC分类号： H01L29/513 ,  H01L21/02172 ,  H01L21/022 ,  H01L21/28158 ,  H01L21/28211 ,  H01L21/283 ,  H01L29/42364 ,  H01L29/517 ,  H01L29/78

摘要： This description relates to a method including forming an interfacial layer over a semiconductor substrate. The method further includes etching back the interfacial layer. The method further includes performing an ultraviolet (UV) curing process on the interfacial layer. The UV curing process includes supplying a gas flow rate ranging from 10 standard cubic centimeters per minute (sccm) to 5 standard liters per minute (slm), wherein the gas comprises inert gas, and heating the interfacial layer at a temperature less than or equal to 700° C. The method further includes depositing a high-k dielectric material over the interfacial layer.

摘要翻译： 该描述涉及包括在半导体衬底上形成界面层的方法。 该方法还包括蚀刻回界面层。 该方法还包括在界面层上进行紫外线（UV）固化过程。 UV固化方法包括将每分钟10标准立方厘米（sccm）的气体流速提供到5标准升/分钟（slm），其中气体包括惰性气体，并且在小于或等于的温度下加热界面层 至700℃。该方法还包括在界面层上沉积高k介电材料。

公开(公告)号：US20130126818A1

公开(公告)日：2013-05-23

申请号：US13304085

申请日：2011-11-23

申请人： Albert Chin ,  Chun-Hu Cheng

发明人： Albert Chin ,  Chun-Hu Cheng

IPC分类号： H01L45/00 ,  H01L21/8239 ,  B82Y99/00 ,  B82Y30/00

CPC分类号： H01L45/04 ,  B82Y10/00 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/1641

摘要： Resistive random access memory (RRAM) using stacked dielectrics and a method for manufacturing the same are disclosed, where a setting power of only 4 μW, an ultra-low reset power of 2 nW, good switching uniformity and excellent cycling endurance up to 5×109 cycles were achieved simultaneously. Such record high performances were reached in a Ni/GeOx/nano-crystal-TiO2/TaON/TaN RRAM device, where the excellent endurance is 4˜6 orders of magnitude larger than existing Flash memory. The very long endurance and low switching energy RRAM is not only satisfactory for portable SSD in a computer, but may also create new applications such as being used for a Data Center to replace high power consumption hard discs.

摘要翻译： 公开了使用堆叠电介质的电阻随机存取存储器（RRAM）及其制造方法，其中设置功率仅为4μW，超低复位功率为2nW，良好的开关均匀性和优异的循环耐受性高达5× 同时实现了109个循环。 在Ni / GeOx / nano-crystal-TiO2 / TaON / TaN RRAM器件中达到了这样的高性能，其耐久性比现有闪存大4〜6个数量级。 非常长的耐用性和低开关能量RRAM不仅对于计算机中的便携式SSD是令人满意的，而且还可以创建新的应用，例如用于数据中心来替代高功率硬盘。

公开(公告)号：US20120322253A1

公开(公告)日：2012-12-20

申请号：US13595599

申请日：2012-08-27

申请人： Liang-Gi YAO ,  Chun-Hu CHENG ,  Chen-Yi LEE ,  Jeff J. XU ,  Clement Hsingjen WANN

发明人： Liang-Gi YAO ,  Chun-Hu CHENG ,  Chen-Yi LEE ,  Jeff J. XU ,  Clement Hsingjen WANN

IPC分类号： H01L21/283 ,  H01L21/311

CPC分类号： H01L29/513 ,  H01L21/02172 ,  H01L21/022 ,  H01L21/28158 ,  H01L21/28211 ,  H01L21/283 ,  H01L29/42364 ,  H01L29/517 ,  H01L29/78

摘要： This description relates to a method including forming an interfacial layer over a semiconductor substrate. The method further includes etching back the interfacial layer. The method further includes performing an ultraviolet (UV) curing process on the interfacial layer. The UV curing process includes supplying a gas flow rate ranging from 10 standard cubic centimeters per minute (sccm) to 5 standard liters per minute (slm), wherein the gas comprises inert gas, and heating the interfacial layer at a temperature less than or equal to 700° C. The method further includes depositing a high-k dielectric material over the interfacial layer.

摘要翻译： 该描述涉及包括在半导体衬底上形成界面层的方法。 该方法还包括蚀刻回界面层。 该方法还包括在界面层上进行紫外线（UV）固化过程。 UV固化方法包括将每分钟10标准立方厘米（sccm）的气体流速提供到5标准升/分钟（slm），其中气体包括惰性气体，并且在小于或等于的温度下加热界面层 至700℃。该方法还包括在界面层上沉积高k电介质材料。

公开(公告)号：US08268683B2

公开(公告)日：2012-09-18

申请号：US12782859

申请日：2010-05-19

申请人： Liang-Gi Yao ,  Chun-Hu Cheng ,  Chen-Yi Lee ,  Jeff J. Xu ,  Clement Hsingjen Wann

发明人： Liang-Gi Yao ,  Chun-Hu Cheng ,  Chen-Yi Lee ,  Jeff J. Xu ,  Clement Hsingjen Wann

IPC分类号： H01L21/8249

CPC分类号： H01L29/513 ,  H01L21/02172 ,  H01L21/022 ,  H01L21/28158 ,  H01L21/28211 ,  H01L21/283 ,  H01L29/42364 ,  H01L29/517 ,  H01L29/78

摘要： A method for reducing interfacial layer (IL) thickness for high-k dielectrics and metal gate stack is provided. In one embodiment, the method includes forming an interfacial layer on a semiconductor substrate, etching back the interfacial layer, depositing a high-k dielectric material over the interfacial layer, and forming a metal gate over the high-k dielectric material. The IL can be chemical oxide, ozonated oxide, thermal oxide, or formed by ultraviolet ozone (UVO) oxidation process from chemical oxide, etc. The etching back of IL can be performed by a Diluted HF (DHF) process, a vapor HF process, or any other suitable process. The method can further include performing UV curing or low thermal budget annealing on the interfacial layer before depositing the high-k dielectric material.

摘要翻译： 提供了一种用于降低高k电介质和金属栅极叠层的界面层（IL）厚度的方法。 在一个实施例中，该方法包括在半导体衬底上形成界面层，蚀刻回界面层，在界面层上沉积高k电介质材料，以及在高k电介质材料上形成金属栅极。 IL可以是化学氧化物，臭氧化氧化物，热氧化物，或者由化学氧化物等的紫外线臭氧（UVO）氧化过程形成.II的回蚀可以通过稀释HF（DHF）工艺，蒸气HF工艺 ，或任何其他合适的过程。 该方法还可以包括在沉积高k介电材料之前在界面层上进行UV固化或低热预算退火。

公开(公告)号：US20100317184A1

公开(公告)日：2010-12-16

申请号：US12782859

申请日：2010-05-19

申请人： Liang-Gi YAO ,  Chun-Hu CHENG ,  Chen-Yi LEE ,  Jeff J. XU ,  Clement Hsingjen WANN

发明人： Liang-Gi YAO ,  Chun-Hu CHENG ,  Chen-Yi LEE ,  Jeff J. XU ,  Clement Hsingjen WANN

IPC分类号： H01L21/28

CPC分类号： H01L29/513 ,  H01L21/02172 ,  H01L21/022 ,  H01L21/28158 ,  H01L21/28211 ,  H01L21/283 ,  H01L29/42364 ,  H01L29/517 ,  H01L29/78

摘要： A method for reducing interfacial layer (IL) thickness for high-k dielectrics and metal gate stack is provided. In one embodiment, the method includes forming an interfacial layer on a semiconductor substrate, etching back the interfacial layer, depositing a high-k dielectric material over the interfacial layer, and forming a metal gate over the high-k dielectric material. The IL can be chemical oxide, ozonated oxide, thermal oxide, or formed by ultraviolet ozone (UVO) oxidation process from chemical oxide, etc. The etching back of IL can be performed by a Diluted HF (DHF) process, a vapor HF process, or any other suitable process. The method can further include performing UV curing or low thermal budget annealing on the interfacial layer before depositing the high-k dielectric material.

摘要翻译： 提供了一种用于降低高k电介质和金属栅极叠层的界面层（IL）厚度的方法。 在一个实施例中，该方法包括在半导体衬底上形成界面层，蚀刻回界面层，在界面层上沉积高k电介质材料，以及在高k电介质材料上形成金属栅极。 IL可以是化学氧化物，臭氧化氧化物，热氧化物，或者由化学氧化物等的紫外线臭氧（UVO）氧化过程形成.II的回蚀可以通过稀释HF（DHF）工艺，蒸汽HF工艺 ，或任何其他合适的过程。 该方法还可以包括在沉积高k介电材料之前在界面层上进行UV固化或低热预算退火。