Semiconductor Device and Method for Forming Passive Circuit Elements With Through Silicon Vias to Backside Interconnect Structures

发明申请

US20130015554A1 Semiconductor Device and Method for Forming Passive Circuit Elements With Through Silicon Vias to Backside Interconnect Structures 有权

标题翻译：用于形成具有通过硅通孔的无源电路元件到半导体互连结构的半导体器件和方法

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专利标题： Semiconductor Device and Method for Forming Passive Circuit Elements With Through Silicon Vias to Backside Interconnect Structures
专利标题（中）： 用于形成具有通过硅通孔的无源电路元件到半导体互连结构的半导体器件和方法
申请号： US13615308

申请日： 2012-09-13
公开(公告)号： US20130015554A1

公开(公告)日： 2013-01-17
发明人: Yaojian Lin , Haijing Cao , Qing Zhang , Kang Chen , Jianmin Fang
申请人： Yaojian Lin , Haijing Cao , Qing Zhang , Kang Chen , Jianmin Fang
申请人地址： SG Singapore
专利权人： STATS ChipPAC, Ltd.
当前专利权人： STATS ChipPAC, Ltd.
当前专利权人地址： SG Singapore
主分类号： H01L29/86
IPC分类号： H01L29/86 ; H01L21/02

Semiconductor Device and Method for Forming Passive Circuit Elements With Through Silicon Vias to Backside Interconnect Structures

摘要：

A semiconductor wafer contains a substrate having a plurality of active devices formed thereon. An analog circuit is formed on the substrate. The analog circuit can be an inductor, metal-insulator-metal capacitor, or resistor. The inductor is made with copper. A through substrate via (TSV) is formed in the substrate. A conductive material is deposited in the TSV in electrical contact with the analog circuit. An under bump metallization layer is formed on a backside of the substrate in electrical contact with the TSV. A solder material is deposited on the UBM layer. The solder material is reflowed to form a solder bump. A wire bond is formed on a top surface of the substrate. A redistribution layer is formed between the TSV and UBM. The analog circuit electrically connects through the TSV to the solder bump on the back side of the substrate.

摘要（中）：

半导体晶片包含其上形成有多个有源器件的衬底。在基板上形成模拟电路。模拟电路可以是电感，金属 - 绝缘体 - 金属电容或电阻。电感由铜制成。在衬底中形成贯穿衬底通孔（TSV）。导电材料沉积在与模拟电路电接触的TSV中。在与TSV电接触的衬底的背面上形成凸起下金属化层。焊料材料沉积在UBM层上。焊料材料被回流以形成焊料凸块。在基板的顶表面上形成引线接合。在TSV和UBM之间形成再分配层。模拟电路通过TSV电连接到衬底背面的焊料凸块。

公开/授权文献

US08592311B2 Semiconductor device and method for forming passive circuit elements with through silicon vias to backside interconnect structures 公开/授权日：2013-11-26

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IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L29/00	专门适用于整流、放大、振荡或切换，并具有至少一个电位跃变势垒或表面势垒的半导体器件；具有至少一个电位跃变势垒或表面势垒，例如PN结耗尽层或载流子集结层的电容器或电阻器；半导体本体或其电极的零部件（H01L31/00至H01L47/00，H01L51/05优先；除半导体或其电极之外的零部件入H01L23/00；由在一个共用衬底内或其上形成的多个固态组件组成的器件入H01L27/00）
H01L29/66	.按半导体器件的类型区分的
H01L29/86	..只能通过对一个或多个通有待整流，放大、振荡或切换的电流的电极供给电流的变化或施加电位的变化方可进行控制的（H01L29/96优先）