发明申请
- 专利标题: STUB MINIMIZATION FOR MULTI-DIE WIREBOND ASSEMBLIES WITH PARALLEL WINDOWS
- 专利标题(中): 具有平行窗口的多芯线绕组组合的最小化
-
申请号: US13440515申请日: 2012-04-05
-
公开(公告)号: US20130083583A1公开(公告)日: 2013-04-04
- 发明人: Richard Dewitt Crisp , Wael Zohni , Belgacem Haba , Frank Lambrecht
- 申请人: Richard Dewitt Crisp , Wael Zohni , Belgacem Haba , Frank Lambrecht
- 申请人地址: US CA San Jose
- 专利权人: Invensas Corporation
- 当前专利权人: Invensas Corporation
- 当前专利权人地址: US CA San Jose
- 主分类号: G11C5/06
- IPC分类号: G11C5/06
摘要:
A microelectronic package can include a substrate having first and second opposed surfaces and first and second apertures extending between the first and second surfaces, first and second microelectronic elements each having a surface facing the first surface of the substrate, a plurality of terminals exposed at the second surface in a central region thereof, and leads electrically connected between contacts of each microelectronic element and the terminals. The apertures can have first and second parallel axes extending in directions of the lengths of the respective apertures. The central region of the second surface can be disposed between the first and second axes. The terminals can be configured to carry address information usable by circuitry within the microelectronic package to determine an addressable memory location from among all the available addressable memory locations of a memory storage array within the microelectronic elements.
公开/授权文献
信息查询