发明申请
US20130161817A1 TECHNIQUES FOR WAFER-LEVEL PROCESSING OF QFN PACKAGES 有权
QFN封装的水平加工技术

TECHNIQUES FOR WAFER-LEVEL PROCESSING OF QFN PACKAGES
摘要:
Semiconductor package device, such as wafer-level package semiconductor devices, are described that have pillars for providing electrical interconnectivity. In an implementation, the wafer-level package devices include an integrated circuit chip having at least one pillar formed over the integrated circuit chip. The pillar is configured to provide electrical interconnectivity with the integrated circuit chip. The wafer-level package device also includes an encapsulation structure configured to support the pillar.
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