发明申请
- 专利标题: TECHNIQUES FOR WAFER-LEVEL PROCESSING OF QFN PACKAGES
- 专利标题(中): QFN封装的水平加工技术
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申请号: US13690634申请日: 2012-11-30
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公开(公告)号: US20130161817A1公开(公告)日: 2013-06-27
- 发明人: Viren Khandekar , Karthik Thambidurai , Ahmad Ashrafzadeh , Amit Kelkar , Hien D. Nguyen
- 申请人: Maxim Integrated Products, Inc.
- 申请人地址: US CA San Jose
- 专利权人: Maxim Integrated Products, Inc.
- 当前专利权人: Maxim Integrated Products, Inc.
- 当前专利权人地址: US CA San Jose
- 主分类号: H01L23/29
- IPC分类号: H01L23/29 ; H01L23/50 ; H01L21/56
摘要:
Semiconductor package device, such as wafer-level package semiconductor devices, are described that have pillars for providing electrical interconnectivity. In an implementation, the wafer-level package devices include an integrated circuit chip having at least one pillar formed over the integrated circuit chip. The pillar is configured to provide electrical interconnectivity with the integrated circuit chip. The wafer-level package device also includes an encapsulation structure configured to support the pillar.
公开/授权文献
- US08860222B2 Techniques for wafer-level processing of QFN packages 公开/授权日:2014-10-14
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