发明申请
- 专利标题: NON-VOLATILE MEMORY (NVM) AND LOGIC INTEGRATION
- 专利标题(中): 非易失性存储器(NVM)和逻辑集成
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申请号: US13780574申请日: 2013-02-28
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公开(公告)号: US20130178027A1公开(公告)日: 2013-07-11
- 发明人: Mark D. Hall , Frank K. Baker, JR. , Mehul D. Shroff
- 申请人: Mark D. Hall , Frank K. Baker, JR. , Mehul D. Shroff
- 申请人地址: US TX Austin
- 专利权人: Freescale Semiconductor, Inc.
- 当前专利权人: Freescale Semiconductor, Inc.
- 当前专利权人地址: US TX Austin
- 主分类号: H01L29/66
- IPC分类号: H01L29/66
摘要:
A method of forming an NVM cell and a logic transistor uses a semiconductor substrate. A polysilicon select gate of the NVM cell is formed over a first thermally-grown oxygen-containing layer in an NVM region and a polysilicon dummy gate is formed over a second thermally-grown oxygen-containing layer in a logic region. Source/drains, a sidewall spacer, and silicided regions of the logic transistor are formed after the first and second thermally-grown oxygen-containing layers are formed. The second thermally-grown oxygen-containing layer and the dummy gate are replaced by a metal gate and a high-k dielectric. The logic transistor is protected while the NVM cell is then formed including forming a charge storage layer.
公开/授权文献
- US08669158B2 Non-volatile memory (NVM) and logic integration 公开/授权日:2014-03-11
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