发明申请
US20130178027A1 NON-VOLATILE MEMORY (NVM) AND LOGIC INTEGRATION 有权
非易失性存储器(NVM)和逻辑集成

NON-VOLATILE MEMORY (NVM) AND LOGIC INTEGRATION
摘要:
A method of forming an NVM cell and a logic transistor uses a semiconductor substrate. A polysilicon select gate of the NVM cell is formed over a first thermally-grown oxygen-containing layer in an NVM region and a polysilicon dummy gate is formed over a second thermally-grown oxygen-containing layer in a logic region. Source/drains, a sidewall spacer, and silicided regions of the logic transistor are formed after the first and second thermally-grown oxygen-containing layers are formed. The second thermally-grown oxygen-containing layer and the dummy gate are replaced by a metal gate and a high-k dielectric. The logic transistor is protected while the NVM cell is then formed including forming a charge storage layer.
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