发明申请
- 专利标题: Embedded JFETs for High Voltage Applications
- 专利标题(中): 用于高压应用的嵌入式JFET
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申请号: US13481462申请日: 2012-05-25
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公开(公告)号: US20130313617A1公开(公告)日: 2013-11-28
- 发明人: Jen-Hao Yeh , Chih-Chang Cheng , Ru-Yi Su , Ker Hsiao Huo , Po-Chih Chen , Fu-Chih Yang , Chun Lin Tsai
- 申请人: Jen-Hao Yeh , Chih-Chang Cheng , Ru-Yi Su , Ker Hsiao Huo , Po-Chih Chen , Fu-Chih Yang , Chun Lin Tsai
- 申请人地址: TW Hsin-Chu
- 专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- 当前专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- 当前专利权人地址: TW Hsin-Chu
- 主分类号: H01L29/80
- IPC分类号: H01L29/80
摘要:
A device includes a buried well region and a first HVW region of the first conductivity, and an insulation region over the first HVW region. A drain region of the first conductivity type is disposed on a first side of the insulation region and in a top surface region of the first HVW region. A first well region and a second well region of a second conductivity type opposite the first conductivity type are on the second side of the insulation region. A second HVW region of the first conductivity type is disposed between the first and the second well regions, wherein the second HVW region is connected to the buried well region. A source region of the first conductivity type is in a top surface region of the second HVW region, wherein the source region, the drain region, and the buried well region form a JFET.
公开/授权文献
- US08704279B2 Embedded JFETs for high voltage applications 公开/授权日:2014-04-22