发明申请
- 专利标题: Automatic Misalignment Balancing Scheme for Multi-Patterning Technology
- 专利标题(中): 多图案化技术的自动对准平衡方案
-
申请号: US13562436申请日: 2012-07-31
-
公开(公告)号: US20140038085A1公开(公告)日: 2014-02-06
- 发明人: Chan-Hong Chern , Tao Wen Chung , Ming-Chieh Huang , Chih-Chang Lin , Tsung-Ching (Jim) Huang , Fu-Lung Hsueh
- 申请人: Chan-Hong Chern , Tao Wen Chung , Ming-Chieh Huang , Chih-Chang Lin , Tsung-Ching (Jim) Huang , Fu-Lung Hsueh
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人地址: TW Hsin-Chu
- 主分类号: G06F17/50
- IPC分类号: G06F17/50 ; G03F1/68
摘要:
Some aspects of the present disclosure provide for a method of automatically balancing mask misalignment for multiple patterning layers to minimize the consequences of mask misalignment. In some embodiments, the method defines a routing grid for one or more double patterning layers within an IC layout. The routing grid has a plurality of vertical grid lines extending along a first direction and a plurality of horizontal grid lines extending along a second, orthogonal direction. Alternating lines of the routing grid in a given direction (e.g., the horizontal and vertical direction) are assigned different colors. Shapes on the double patterning layers are then routed along the routing grid in a manner that alternates between different colored grid lines. By routing in such a manner, variations in capacitive coupling caused by mask misalignment are reduced.