Invention Application
US20140284705A1 METHOD OF MANUFACTURING VERTICAL PLANAR POWER MOSFET AND METHOD OF MANUFACTURING TRENCH-GATE POWER MOSFET
有权
制造垂直平面功率MOSFET的方法及制造TRENCH-GATE功率MOSFET的方法
- Patent Title: METHOD OF MANUFACTURING VERTICAL PLANAR POWER MOSFET AND METHOD OF MANUFACTURING TRENCH-GATE POWER MOSFET
- Patent Title (中): 制造垂直平面功率MOSFET的方法及制造TRENCH-GATE功率MOSFET的方法
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Application No.: US14300327Application Date: 2014-06-10
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Publication No.: US20140284705A1Publication Date: 2014-09-25
- Inventor: Satoshi EGUCHI , Yuya ABIKO , Junichi KOGURE
- Applicant: RENESAS ELECTRONICS CORPORATION
- Priority: JP2012-013030 20120125
- Main IPC: H01L29/78
- IPC: H01L29/78
Abstract:
In the manufacturing steps of a super-junction power MOSFET having a drift region having a super junction structure, after the super junction structure is formed, introduction of a body region and the like and heat treatment related thereto are typically performed. However, in the process thereof, a dopant in each of P-type column regions and the like included in the super junction structure is diffused to result in a scattered dopant profile. This causes problems such as degradation of a breakdown voltage when a reverse bias voltage is applied between a drain and a source and an increase in ON resistance. According to the present invention, in a method of manufacturing a silicon-based vertical planar power MOSFET, a body region forming a channel region is formed by selective epitaxial growth.
Public/Granted literature
- US08921927B2 Method of manufacturing vertical planar power MOSFET and method of manufacturing trench-gate power MOSFET Public/Granted day:2014-12-30
Information query
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