Invention Application
US20140327011A1 III-NITRIDE TRANSISTOR LAYOUT 有权
III-NITRIDE晶体管布局

III-NITRIDE TRANSISTOR LAYOUT
Abstract:
A semiconductor device containing a GaN FET has an isolating gate structure outside the channel area which is operable to block current in the two-dimensional electron gas between two regions of the semiconductor device. The isolating gate structure is formed concurrently with the gate of the GaN FET, and has a same structure as the gate.
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