Invention Application
US20150187897A1 PARTIAL SACRIFICIAL DUMMY GATE WITH CMOS DEVICE WITH HIGH-K METAL GATE
有权
具有高K金属栅的CMOS器件的部分真正的门
- Patent Title: PARTIAL SACRIFICIAL DUMMY GATE WITH CMOS DEVICE WITH HIGH-K METAL GATE
- Patent Title (中): 具有高K金属栅的CMOS器件的部分真正的门
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Application No.: US14657723Application Date: 2015-03-13
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Publication No.: US20150187897A1Publication Date: 2015-07-02
- Inventor: Dechao Guo , Wilfried E. Haensch , Shu-jen Han , Daniel J Jaeger , Yu Lu , Keith Kwong Hon Wong
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L29/49
Abstract:
A gate structure in a semiconductor device includes: a gate stack formed on a substrate with three sections, a bottom portion, a top portion, and a sacrificial cap layer over the top portion; gate spacers, source and drain regions, a nitride encapsulation over top and sidewalls of the gate stack after removal of the sacrificial cap layer, an organic planarizing layer over the nitride encapsulation, planarizing the encapsulation, and silicidation performed over the source and drain regions and the bottom portion after removal of the nitride encapsulation, the organic planarizing layer, and the top portion of the gate stack.
Public/Granted literature
- US09299795B2 Partial sacrificial dummy gate with CMOS device with high-k metal gate Public/Granted day:2016-03-29
Information query
IPC分类:
