Invention Application
US20160093386A1 MITIGATING RELIABILITY DEGRADATION OF ANALOG MEMORY CELLS DURING LONG STATIC AND ERASED STATE RETENTION
审中-公开
在长期静态和擦除状态下，减轻模拟记忆细胞的可靠性降低
- Patent Title: MITIGATING RELIABILITY DEGRADATION OF ANALOG MEMORY CELLS DURING LONG STATIC AND ERASED STATE RETENTION
- Patent Title (中): 在长期静态和擦除状态下，减轻模拟记忆细胞的可靠性降低
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Application No.: US14962333Application Date: 2015-12-08
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Publication No.: US20160093386A1Publication Date: 2016-03-31
- Inventor: Yael Shur , Yoav Kasorla , Moshe Neerman , Naftali Sommer , Avraham Poza Meir , Etai Zaltsman , Eyal Gurgi , Meir Dalal
- Applicant: Apple Inc.
- Main IPC: G11C16/14
- IPC: G11C16/14
Abstract:
A method in a non-volatile memory, which includes multiple memory cells that store data using a predefined set of programming levels including an erased level, includes receiving a storage operation indicating a group of the memory cells that are to be retained without programming for a long time period. The memory cells in the group are set to a retention programming level that is different from the erased level. Upon preparing to program the group of memory cells with data, the group of memory cells is erased to the erased level and the data is then programmed in the group of memory cells.
Public/Granted literature
- US09455040B2 Mitigating reliability degradation of analog memory cells during long static and erased state retention Public/Granted day:2016-09-27
Information query
