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公开(公告)号：US10248515B2
公开(公告)日：2019-04-02
申请号：US15409583
申请日：2017-01-19
申请人： Apple Inc.
发明人： Charan Srinivasan , Eyal Gurgi
摘要： An apparatus includes an interface and storage circuitry. The interface is configured to communicate with a memory that includes multiple memory cells arranged in multiple planes that each includes one or more blocks of the memory cells. The storage circuitry is configured to apply a multi-plane storage operation to multiple blocks simultaneously across the respective planes. In response to detecting that the multi-plane storage operation has failed, the storage circuitry is configured to apply a single-plane storage operation to one or more of the blocks that were accessed in the multi-plane storage operation, including a given block, and to identify the given block as a bad block if the single-plane operation applied to the given block fails. The storage circuitry is further configured to store data in the blocks that were accessed in the multi-plane operation but were not identified as bad blocks.
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公开(公告)号：US20180349044A1
公开(公告)日：2018-12-06
申请号：US15716703
申请日：2017-09-27
申请人： Apple Inc.
发明人： Barak Baum , Barak Sagiv , Einav Yogev , Eyal Gurgi , Ariel Landau
CPC分类号： G06F3/0619 , G06F11/002 , G06F11/1048 , G06F11/1072 , G06F11/108 , G06F11/3058 , G11C7/04 , G11C11/5642
摘要： A memory system includes an interface and storage circuitry. The interface is configured to communicate with a plurality of memory cells that store data by setting the memory cells to analog voltages representative of respective storage values. The storage circuitry is configured to receive data for storage, to measure a temperature at a time of programming the received data, and, to program the received data to the memory cells using a first programming scheme when the measured temperature falls within a predefined normal temperature range, and otherwise to program the received data to the memory cells using a second programming scheme having a lower net storage utilization than the first programming scheme.
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公开(公告)号：US10073634B2
公开(公告)日：2018-09-11
申请号：US14821008
申请日：2015-08-07
申请人： Apple Inc.
发明人： Shai Ojalvo , Eyal Gurgi , Yoav Kasorla
CPC分类号： G06F3/0619 , G06F3/064 , G06F3/0659 , G06F3/0683 , G06F11/008 , G06F11/1012 , G06F11/1044 , G06F11/1068 , G06F11/1076 , G11C29/52
摘要： A method includes storing data encoded with an Error Correction Code (ECC) in analog memory cells, by buffering the data in a volatile buffer and then writing the buffered data to the analog memory cells while overwriting at least some of the data in the volatile buffer with success indications. Upon detecting a failure in writing the buffered data to the analog memory cells, recovered data is produced by reading both the volatile buffer and the analog memory cells, assigning reliability metrics to respective bits of the recovered data depending on whether the bits were read from the volatile buffer or from the analog memory cells, and applying ECC decoding to the recovered data using the reliability metrics. The recovered data is re-programmed.
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4.发明申请公开(公告)号：US20180075926A1
公开(公告)日：2018-03-15
申请号：US15810166
申请日：2017-11-13
申请人： Apple Inc.
发明人： Barak Sagiv , Einav Yogev , Eli Yazovitsky , Eyal Gurgi , Roi Solomon
CPC分类号： G11C29/44 , G11C29/028 , G11C29/38
摘要： A storage apparatus includes a plurality of memory cells and storage circuitry. The storage circuitry is configured to store a mapping that maps sets of readout bit-flip counts to respective predefined impairment profiles. The impairment profiles specify two or more severity levels of respective impairment types, including read disturb, retention and endurance. Each of the bit-flip counts includes a one-to-zero error count or a zero-to-one error count. The storage circuitry is configured to read data from a group of the memory cells using given readout parameters, to evaluate an actual set of bit-flip counts corresponding to the read data, to classify the group of the memory cells to a respective impairment profile by mapping the actual set of the bit-flip counts using the mapping, and to adapt the readout parameters based on the impairment profile to which the group of the memory cells was classified.
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5.发明授权公开(公告)号：US09847141B1
公开(公告)日：2017-12-19
申请号：US15225863
申请日：2016-08-02
申请人： APPLE INC.
发明人： Barak Sagiv , Einav Yogev , Eli Yazovitsky , Eyal Gurgi , Roi Solomon
CPC分类号： G11C29/44 , G11C29/028 , G11C29/38
摘要： A storage apparatus includes a plurality of memory cells and storage circuitry. The storage circuitry is configured to store a mapping that maps sets of readout bit-flip counts to respective predefined impairment profiles. The impairment profiles specify two or more severity levels of respective impairment types, including read disturb, retention and endurance. Each of the bit-flip counts includes a one-to-zero error count or a zero-to-one error count. The storage circuitry is configured to read data from a group of the memory cells using given readout parameters, to evaluate an actual set of bit-flip counts corresponding to the read data, to classify the group of the memory cells to a respective impairment profile by mapping the actual set of the bit-flip counts using the mapping, and to adapt the readout parameters based on the impairment profile to which the group of the memory cells was classified.
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公开(公告)号：US09817751B2
公开(公告)日：2017-11-14
申请号：US14475609
申请日：2014-09-03
申请人： Apple Inc.
发明人： Stas Mouler , Shai Ojalvo , Yoav Kasorla , Eyal Gurgi
CPC分类号： G06F12/0246 , G06F2212/1024 , G06F2212/1032 , G06F2212/7202 , G06F2212/7206 , G11C7/1006 , G11C11/5628 , G11C2211/5641
摘要： A method for data storage includes defining an end-to-end mapping between data bits to be stored in a memory device that includes multiple memory cells and predefined programming levels. The data bits are mapped into mapped bits, so that the number of the mapped bits is smaller than the number of the data bits. The data bits are stored in the memory device by programming the mapped bits in the memory cells using a programming scheme that guarantees the end-to-end mapping. After storing the data bits, the data bits are read from the memory device in accordance with the end-to-end mapping.
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公开(公告)号：US09811413B2
公开(公告)日：2017-11-07
申请号：US14447114
申请日：2014-07-30
申请人： Apple Inc.
发明人： Shai Ojalvo , Yair Schwartz , Eyal Gurgi , Yoav Kasorla
CPC分类号： G06F11/1008 , G06F3/0619 , G06F3/064 , G06F3/0688 , G06F3/0689 , G06F11/1076 , G06F11/1096 , G11C29/00
摘要： A system for data storage includes one or more non-volatile memory (NVM) devices, each device including multiple memory blocks, and a processor. The processor is configured to assign the memory blocks into groups, to apply a redundant data storage scheme in each of the groups, to identify a group of the memory blocks including at least one bad block that renders remaining memory blocks in the group orphan blocks, to select a type of data suitable for storage in the orphan blocks, and to store the data of the identified type in the orphan blocks.
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公开(公告)号：US09595343B1
公开(公告)日：2017-03-14
申请号：US15173655
申请日：2016-06-05
申请人： Apple Inc.
发明人： Charan Srinivasan , Eyal Gurgi
CPC分类号： G11C16/10 , G11C16/3459 , G11C16/349
摘要： A storage device includes multiple memory cells and storage circuitry. The storage circuitry is configured to write data to a group of the memory cells by applying to the group of the memory cells up to a maximal number of programming pulses. The storage circuitry is further configured to evaluate, after applying less than the maximal number of programming pulses, a criterion that predicts whether or not the data will be written successfully within the maximal number of programming pulses, and when the criterion predicts that writing the data will fail, to perform a corrective operation.
摘要翻译： 存储设备包括多个存储器单元和存储电路。 存储电路被配置为通过将最多数量的编程脉冲施加到存储器单元组来将数据写入一组存储器单元。 存储电路还被配置为在应用小于编程脉冲的最大数量之后评估一种标准，该标准预测数据是否将在最大编程脉冲数内成功写入，并且当标准预测写数据时 将失败，执行纠正操作。
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公开(公告)号：US09594615B2
公开(公告)日：2017-03-14
申请号：US14501081
申请日：2014-09-30
申请人： APPLE INC.
发明人： Yael Shur , Eyal Gurgi , Moshe Neerman , Naftali Sommer
CPC分类号： G06F11/076 , G06F11/073 , G06F11/1012 , G06F11/1072 , G11C11/5642 , G11C11/5692 , G11C16/26 , G11C29/00 , G11C29/42
摘要： A method for data storage includes reading from a memory device data that is stored in a group of memory cells as respective analog values, and classifying readout errors in the read data into at least first and second different types, depending on zones in which the analog values fall. A memory quality that emphasizes the readout errors of the second type is assigned to the group of the memory cells, based on evaluated numbers of the readout errors of the first and second types.
摘要翻译： 一种用于数据存储的方法包括：从存储器件读取作为相应模拟值存储在一组存储器单元中的数据，并将读出的数据中的读出错误分类为至少第一和第二不同类型，这取决于模拟 价值下降。 基于第一和第二类型的读出错误的评估数，将强调第二类型的读出错误的存储器质量分配给存储器单元组。
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10.发明授权Correcting soft reliability measures of storage values read from memory cells 有权更正从存储单元读取的存储值的软可靠性度量公开(公告)号：US09489257B2
公开(公告)日：2016-11-08
申请号：US14499207
申请日：2014-09-28
申请人： Apple Inc.
发明人： Tomer Ish-Shalom , Eyal Gurgi , Moti Teitel
CPC分类号： G06F11/1068 , G06F11/1012 , G11C29/52 , H03M13/45
摘要： A method for data storage includes reading storage values, which represent stored data, from a group of memory cells using read thresholds, and deriving respective soft reliability metrics for the storage values. The storage values are classified into two or more subgroups based on a predefined classification criterion. Independently within each subgroup, a subgroup-specific distribution of the storage values in the subgroup is estimated, and the soft reliability metrics of the storage values in the subgroup are corrected based on the subgroup-specific distribution. The stored data is decoded using the corrected soft reliability metrics.
摘要翻译： 一种用于数据存储的方法包括：使用读取阈值从一组存储器单元读取表示存储数据的存储值，以及导出用于存储值的相应的软可靠性度量。 基于预定义的分类标准将存储值分类为两个或更多个子组。 在每个子组内独立地估计子组中存储值的子组特定分布，并且基于子组特定分布来校正子组中的存储值的软可靠性度量。 使用校正的软可靠性度量对存储的数据进行解码。
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