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公开(公告)号：US10755787B2
公开(公告)日：2020-08-25
申请号：US16202127
申请日：2018-11-28
Applicant: Apple Inc.
Inventor： Eli Yazovitsky , Assaf Shappir , Itay Sagron , Meir Dalal
Abstract: A storage device includes storage circuitry and multiple memory cells. The memory cells are organized in multiple memory blocks of a nonvolatile memory. The storage circuitry is configured to define a partial verification scheme that specifies testing only a data portion of the data programmed to the memory blocks, to program data to a memory block, calculate redundancy data over the data, and save the calculated redundancy data in a dedicated memory, to verify that the data portion specified for the memory block in the partial verification scheme has been programmed successfully, to check a predefined condition for conditionally performing full verification to the memory block, when the predefined condition is fulfilled, to verify that data programmed to the memory block and not tested using the partial verification scheme has been programmed successfully, and to recover, using the redundancy data, at least part of the data programmed that failed verification.
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2.发明申请MITIGATING RELIABILITY DEGRADATION OF ANALOG MEMORY CELLS DURING LONG STATIC AND ERASED STATE RETENTION 审中-公开在长期静态和擦除状态下，减轻模拟记忆细胞的可靠性降低公开(公告)号：US20160093386A1
公开(公告)日：2016-03-31
申请号：US14962333
申请日：2015-12-08
Applicant: Apple Inc.
Inventor： Yael Shur , Yoav Kasorla , Moshe Neerman , Naftali Sommer , Avraham Poza Meir , Etai Zaltsman , Eyal Gurgi , Meir Dalal
IPC: G11C16/14
CPC classification number: G11C16/14 , G11C11/5628 , G11C16/0483 , G11C16/16 , G11C16/3418 , G11C16/349
Abstract: A method in a non-volatile memory, which includes multiple memory cells that store data using a predefined set of programming levels including an erased level, includes receiving a storage operation indicating a group of the memory cells that are to be retained without programming for a long time period. The memory cells in the group are set to a retention programming level that is different from the erased level. Upon preparing to program the group of memory cells with data, the group of memory cells is erased to the erased level and the data is then programmed in the group of memory cells.
Abstract translation: 一种非易失性存储器中的方法，其包括使用包括擦除级别的预定义编程级别集存储数据的多个存储器单元，包括接收指示要保留的一组存储器单元的存储操作，而不进行编程 长时间 组中的存储单元被设置为与擦除的电平不同的保持编程电平。 在准备使用数据对存储器单元组进行编程时，存储器单元组被擦除到擦除的电平，然后将数据编程在存储器单元组中。
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3.发明授权Optimized threshold search in analog memory cells using separator pages of the same type as read pages 有权使用与读取页面相同类型的分隔符页面在模拟记忆体单元中优化阈值搜索公开(公告)号：US08830746B2
公开(公告)日：2014-09-09
申请号：US13905580
申请日：2013-05-30
Applicant: Apple Inc.
Inventor： Maya Barkon , Meir Dalal , Moti Teitel , Micha Anholt
CPC classification number: G11C27/00 , G11C11/5642 , G11C16/3418 , G11C29/021 , G11C29/028
Abstract: A method includes reading a group of analog memory cells using first explicit read thresholds, to produce first readout results. The group is re-read using second explicit read thresholds, to produce second readout results. The group is read using one or more sets of auxiliary thresholds so as to produce auxiliary readout results, such that the number of the auxiliary thresholds in each set is the same as the number of the first explicit read thresholds and the same as the number of the second explicit read thresholds. A readout performance of third read thresholds, which include at least one of the first explicit read thresholds and at least one of the second explicit read thresholds, is evaluated using the first, second and auxiliary readout results.
Abstract translation: 一种方法包括使用第一显式读取阈值读取一组模拟存储器单元，以产生第一读出结果。 使用第二显式读取阈值重新读取该组，以产生第二读取结果。 使用一组或多组辅助阈值读取组，以产生辅助读出结果，使得每组中的辅助阈值的数量与第一显式读取阈值的数量相同，并且与第 第二个显式读取阈值。 使用第一，第二和辅助读出结果评估包括第一显式读取阈值和至少一个第二显式读取阈值中的至少一个的第三读取阈值的读出性能。
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Patent Agency Ranking
公开(公告)号：US20200005873A1
公开(公告)日：2020-01-02
申请号：US16202127
申请日：2018-11-28
Applicant: Apple Inc.
Inventor： Eli Yazovitsky , Assaf Shappir , Itay Sagron , Meir Dalal
Abstract: A storage device includes storage circuitry and multiple memory cells. The memory cells are organized in multiple memory blocks of a nonvolatile memory. The storage circuitry is configured to define a partial verification scheme that specifies testing only a data portion of the data programmed to the memory blocks, to program data to a memory block, calculate redundancy data over the data, and save the calculated redundancy data in a dedicated memory, to verify that the data portion specified for the memory block in the partial verification scheme has been programmed successfully, to check a predefined condition for conditionally performing full verification to the memory block, when the predefined condition is fulfilled, to verify that data programmed to the memory block and not tested using the partial verification scheme has been programmed successfully, and to recover, using the redundancy data, at least part of the data programmed that failed verification.
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5.发明申请OPTIMIZED THRESHOLD SEARCH IN ANALOG MEMORY CELLS USING SEPARATOR PAGES OF THE SAME TYPE AS READ PAGES 有权优化的阈值搜索模拟记忆细胞使用相同类型的分隔符页作为阅读页公开(公告)号：US20130258738A1
公开(公告)日：2013-10-03
申请号：US13905580
申请日：2013-05-30
Applicant: Apple Inc.
Inventor： Maya Barkon , Meir Dalal , Moti Teitel , Micha Anholt
IPC: G11C27/00
CPC classification number: G11C27/00 , G11C11/5642 , G11C16/3418 , G11C29/021 , G11C29/028
Abstract: A method includes reading a group of analog memory cells using first explicit read thresholds, to produce first readout results. The group is re-read using second explicit read thresholds, to produce second readout results. The group is read using one or more sets of auxiliary thresholds so as to produce auxiliary readout results, such that the number of the auxiliary thresholds in each set is the same as the number of the first explicit read thresholds and the same as the number of the second explicit read thresholds. A readout performance of third read thresholds, which include at least one of the first explicit read thresholds and at least one of the second explicit read thresholds, is evaluated using the first, second and auxiliary readout results.
Abstract translation: 一种方法包括使用第一显式读取阈值读取一组模拟存储器单元，以产生第一读出结果。 使用第二显式读取阈值重新读取该组，以产生第二读取结果。 使用一组或多组辅助阈值读取组，以产生辅助读出结果，使得每组中的辅助阈值的数量与第一显式读取阈值的数量相同，并且与第 第二个显式读取阈值。 使用第一，第二和辅助读出结果评估包括第一显式读取阈值和至少一个第二显式读取阈值中的至少一个的第三读取阈值的读出性能。
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公开(公告)号：US09455040B2
公开(公告)日：2016-09-27
申请号：US14962333
申请日：2015-12-08
Applicant: Apple Inc.
Inventor： Yael Shur , Yoav Kasorla , Moshe Neerman , Naftali Sommer , Avraham Poza Meir , Etai Zaltsman , Eyal Gurgi , Meir Dalal
CPC classification number: G11C16/14 , G11C11/5628 , G11C16/0483 , G11C16/16 , G11C16/3418 , G11C16/349
Abstract: A method in a non-volatile memory, which includes multiple memory cells that store data using a predefined set of programming levels including an erased level, includes receiving a storage operation indicating a group of the memory cells that are to be retained without programming for a long time period. The memory cells in the group are set to a retention programming level that is different from the erased level. Upon preparing to program the group of memory cells with data, the group of memory cells is erased to the erased level and the data is then programmed in the group of memory cells.
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7.发明授权Mitigating reliability degradation of analog memory cells during long static and erased state retention 有权在长静态和擦除状态保持期间，减轻模拟存储单元的可靠性降级公开(公告)号：US09236132B2
公开(公告)日：2016-01-12
申请号：US14249448
申请日：2014-04-10
Applicant: Apple Inc.
Inventor： Yael Shur , Yoav Kasorla , Moshe Neerman , Naftali Sommer , Avraham Poza Meir , Etai Zaltsman , Eyal Gurgi , Meir Dalal
CPC classification number: G11C16/14 , G11C11/5628 , G11C16/0483 , G11C16/16 , G11C16/3418 , G11C16/349
Abstract: A method in a non-volatile memory, which includes multiple memory cells that store data using a predefined set of programming levels including an erased level, includes receiving a storage operation indicating a group of the memory cells that are to be retained without programming for a long time period. The memory cells in the group are set to a retention programming level that is different from the erased level. Upon preparing to program the group of memory cells with data, the group of memory cells is erased to the erased level and the data is then programmed in the group of memory cells.
Abstract translation: 一种非易失性存储器中的方法，其包括使用包括擦除级别的预定义编程级别集存储数据的多个存储器单元，包括接收指示要保留的一组存储器单元的存储操作，而不进行编程 长时间 组中的存储单元设置为与擦除级别不同的保留编程级别。 在准备使用数据对存储器单元组进行编程时，存储器单元组被擦除到擦除的电平，然后将数据编程在存储器单元组中。
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8.发明申请MITIGATING RELIABILITY DEGRADATION OF ANALOG MEMORY CELLS DURING LONG STATIC AND ERASED STATE RETENTION 有权在长期静态和擦除状态下，减轻模拟记忆细胞的可靠性降低公开(公告)号：US20140355347A1
公开(公告)日：2014-12-04
申请号：US14249448
申请日：2014-04-10
Applicant: Apple Inc.
Inventor： Yael Shur , Yoav Kasorla , Moshe Neerman , Naftali Sommer , Avraham Poza Meir , Etai Zaltsman , Eyal Gurgi , Meir Dalal
IPC: G11C16/16
CPC classification number: G11C16/14 , G11C11/5628 , G11C16/0483 , G11C16/16 , G11C16/3418 , G11C16/349
Abstract: A method in a non-volatile memory, which includes multiple memory cells that store data using a predefined set of programming levels including an erased level, includes receiving a storage operation indicating a group of the memory cells that are to be retained without programming for a long time period. The memory cells in the group are set to a retention programming level that is different from the erased level. Upon preparing to program the group of memory cells with data, the group of memory cells is erased to the erased level and the data is then programmed in the group of memory cells.
Abstract translation: 一种非易失性存储器中的方法，其包括使用包括擦除级别的预定义编程级别集存储数据的多个存储器单元，包括接收指示要保留的一组存储器单元的存储操作，而不进行编程 长时间 组中的存储单元设置为与擦除级别不同的保留编程级别。 在准备使用数据对存储器单元组进行编程时，存储器单元组被擦除到擦除的电平，然后将数据编程在存储器单元组中。
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