Invention Application
US20160111510A1 SPLIT GATE FLASH MEMORY STRUCTURE WITH A DAMAGE FREE SELECT GATE AND A METHOD OF MAKING THE SPLIT GATE FLASH MEMORY STRUCTURE
有权
具有无损耗选择门的分闸门闪存存储器结构和制造分闸门闪存存储器结构的方法
- Patent Title: SPLIT GATE FLASH MEMORY STRUCTURE WITH A DAMAGE FREE SELECT GATE AND A METHOD OF MAKING THE SPLIT GATE FLASH MEMORY STRUCTURE
- Patent Title (中): 具有无损耗选择门的分闸门闪存存储器结构和制造分闸门闪存存储器结构的方法
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Application No.: US14980165Application Date: 2015-12-28
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Publication No.: US20160111510A1Publication Date: 2016-04-21
- Inventor: Yuan-Tai Tseng , Ming Chyi Liu , Chang-Ming Wu , Shih-Chang Liu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L29/66 ; H01L29/792
Abstract:
A method of manufacturing a split gate flash memory cell is provided. A select gate is formed on a semiconductor substrate. A sacrificial spacer is formed laterally adjacent to the select gate and on a first side of the select gate. A charge trapping layer is formed lining upper surfaces of the select gate and the sacrificial spacer, and further lining a sidewall surface of the select gate on a second side of the select gate that is opposite the first side of the select gate. A memory gate is formed over the charge trapping layer and on the second side of the select gate. The sacrificial spacer is removed. The resulting semiconductor structure is also provided.
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