Invention Application
- Patent Title: Method for Planarizing Semiconductor Device
- Patent Title (中): 半导体器件平面化方法
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Application No.: US14585210Application Date: 2014-12-30
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Publication No.: US20160155649A1Publication Date: 2016-06-02
- Inventor: WEI-NAN FANG , JIANN-SHIUN CHEN , TZU-YI CHUANG
- Applicant: UNITED MICROELECTRONICS CORPORATION
- Priority: CN201410697179.0 20141127
- Main IPC: H01L21/321
- IPC: H01L21/321 ; H01L21/768 ; H01L21/285 ; H01L21/311 ; H01L21/02
Abstract:
A method for planarizing a semiconductor device includes steps herein. A substrate is provided, on which a stop layer is formed. A trench is formed in the substrate. A first semiconductor film is deposited conformally on the stop layer and the trench. A second semiconductor film is deposited to fill the trench and cover the first semiconductor film. A chemical-mechanical polishing process is performed until the stop layer is exposed. A removal rate of the chemical-mechanical polishing process on the first semiconductor film is higher than that on the second semiconductor film. The first dielectric layer on the substrate selectively is removed.
Public/Granted literature
- US09490141B2 Method for planarizing semiconductor device Public/Granted day:2016-11-08
Information query
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