Invention Application
- Patent Title: GATE AND GATE FORMING PROCESS
- Patent Title (中): 门和门的形成过程
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Application No.: US14619085Application Date: 2015-02-11
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Publication No.: US20160233092A1Publication Date: 2016-08-11
- Inventor: Keng-Jen Lin , Chien-Liang Lin , Yu-Ren Wang , Neng-Hui Yang
- Applicant: UNITED MICROELECTRONICS CORP.
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L21/285
Abstract:
A gate forming process includes the following steps. A gate dielectric layer is formed on a substrate. A barrier layer is formed on the gate dielectric layer. A silicon seed layer and a silicon layer are sequentially and directly formed on the barrier layer, wherein the silicon seed layer and the silicon layer are formed by different precursors.
Public/Granted literature
- US09570578B2 Gate and gate forming process Public/Granted day:2017-02-14
Information query
IPC分类:
