Invention Application
US20160233318A1 METHODS OF FORMING A COMPLEX GAA FET DEVICE AT ADVANCED TECHNOLOGY NODES
有权
在先进技术节点形成复合GAA FET器件的方法
- Patent Title: METHODS OF FORMING A COMPLEX GAA FET DEVICE AT ADVANCED TECHNOLOGY NODES
- Patent Title (中): 在先进技术节点形成复合GAA FET器件的方法
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Application No.: US14615529Application Date: 2015-02-06
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Publication No.: US20160233318A1Publication Date: 2016-08-11
- Inventor: Ralf Richter , Peter Javorka , Jan Hoentschel , Stefan Flachowsky
- Applicant: GLOBALFOUNDRIES Inc.
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/78

Abstract:
The present disclosure provides a method of forming a semiconductor device and a semiconductor device. An SOI substrate portion having a semiconductor layer, a buried insulating material layer and a bulk substrate is provided, wherein the buried insulating material layer is interposed between the semiconductor layer and the bulk substrate. The SOI substrate portion is subsequently patterned so as to form a patterned bi-layer stack on the bulk substrate, which bi-layer stack comprises a patterned semiconductor layer and a patterned buried insulating material layer. The bi-layer stack is further enclosed with a further insulating material layer and an electrode material is formed on and around the further insulating material layer. Herein a gate electrode is formed by the bulk substrate and the electrode material such that the gate electrode substantially surrounds a channel portion formed by a portion of the patterned buried insulating material layer.
Public/Granted literature
- US09412848B1 Methods of forming a complex GAA FET device at advanced technology nodes Public/Granted day:2016-08-09
Information query
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