Invention Application
- Patent Title: STRAIN COMPENSATION IN TRANSISTORS
- Patent Title (中): 晶体管中的应变补偿
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Application No.: US15120818Application Date: 2014-03-28
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Publication No.: US20160372607A1Publication Date: 2016-12-22
- Inventor: VAN H. LE , BENJAMIN CHU-KUNG , JACK T. KAVALIEROS , RAVI PILLARISETTY , WILLY RACHMADY , HAROLD W. KENNEL
- Applicant: INTEL CORPORATION
- International Application: PCT/US2014/032129 WO 20140328
- Main IPC: H01L29/786
- IPC: H01L29/786 ; H01L29/66 ; H01L29/423 ; H01L29/15 ; H01L29/06

Abstract:
An embodiment includes a device comprising: a first epitaxial layer, coupled to a substrate, having a first lattice constant; a second epitaxial layer, on the first layer, having a second lattice constant; a third epitaxial layer, contacting an upper surface of the second layer, having a third lattice constant unequal to the second lattice constant; and an epitaxial device layer, on the third layer, including a channel region; wherein (a) the first layer is relaxed and includes defects, (b) the second layer is compressive strained and the third layer is tensile strained, and (c) the first, second, third, and device layers are all included in a trench. Other embodiments are described herein.
Public/Granted literature
- US09818884B2 Strain compensation in transistors Public/Granted day:2017-11-14
Information query
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