Invention Application
- Patent Title: MONOLITHIC REFERENCE ARCHITECTURE WITH BURST MODE SUPPORT
- Patent Title (中): 具有BURST模式支持的单片参考架构
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Application No.: US15259368Application Date: 2016-09-08
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Publication No.: US20170068265A1Publication Date: 2017-03-09
- Inventor: Anand SUBRAMANIAN , Anand KANNAN , Sunil RAFEEQUE , Venakatesh GUDURI
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Priority: IN4756/CHE/2015 20150908
- Main IPC: G05F1/575
- IPC: G05F1/575 ; H03K3/013
Abstract:
A reference circuit may include a bandgap reference stage, a filter stage, and a buffer stage. The reference stage may be configured to generate a reference voltage or current. The filter stage may be coupled to the reference stage and may be configured to receive the reference voltage or current, filter noise from the reference voltage or current, receive a buffer output voltage or current, and filter noise from the buffer output voltage or current. The buffer stage may be coupled to the filter stage and may be configured to isolate the reference stage and the filter stage from a loading effect of a load circuit and generate a reference signal based on the reference voltage or current to drive the load circuit.
Public/Granted literature
- US10054969B2 Monolithic reference architecture with burst mode support Public/Granted day:2018-08-21
Information query
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