Invention Application
- Patent Title: MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
- Patent Title (中): 半导体器件的制造方法
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Application No.: US15259502Application Date: 2016-09-08
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Publication No.: US20170069648A1Publication Date: 2017-03-09
- Inventor: Tadashi YAMAGUCHI
- Applicant: Renesas Electronics Corporation
- Priority: JP2015-177222 20150909
- Main IPC: H01L27/115
- IPC: H01L27/115 ; H01L21/3105 ; H01L29/423 ; H01L21/285 ; H01L21/321 ; H01L21/28 ; H01L29/45 ; H01L29/66

Abstract:
When upper surfaces of a control gate electrode and a memory gate electrode are exposed from an interlayer insulating film by polishing the interlayer insulating film in a gate last process, a silicide layer covering the upper surfaces of the gate electrodes is formed. Thereafter, by reacting a metal film deposited on the silicide layer with the control gate electrode and the memory gate electrode, a silicide layer thicker than the former silicide layer is formed on each of the gate electrodes.
Public/Granted literature
- US09704875B2 Manufacturing method of semiconductor device Public/Granted day:2017-07-11
Information query
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