Invention Application
- Patent Title: OPTIMIZED SOLDER PADS FOR MICROELECTRONIC COMPONENTS
-
Application No.: US15224960Application Date: 2016-08-01
-
Publication No.: US20170141072A1Publication Date: 2017-05-18
- Inventor: Tymon Barwicz , Yves Martin , Jae-Woong Nah
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L25/00 ; H01L25/16

Abstract:
A multi-chip system includes a top chip stack element comprising a top chip having two major surfaces and top solder pads arrayed along a plane of one of the major surfaces; a bottom chip stack element comprising a bottom substrate having two major surfaces and bottom solder pads arrayed along a plane of one of the major surfaces; one or more solder reservoir pads connected to one or more of the top solder pads or of the bottom solder pads; and solder material; and wherein at least one of the top solder pads is connected to one of the bottom solder pads by one of the solder material.
Public/Granted literature
- US10014274B2 Optimized solder pads for microelectronic components Public/Granted day:2018-07-03
Information query
IPC分类: