Invention Application
- Patent Title: DRAM DATA PATH SHARING VIA A SPLIT LOCAL DATA BUS AND A SEGMENTED GLOBAL DATA BUS
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Application No.: US14975293Application Date: 2015-12-18
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Publication No.: US20170177519A1Publication Date: 2017-06-22
- Inventor: Wei WU , Shigeki TOMISHIMA , Shih-Lien L. LU
- Applicant: INTEL CORPORATION
- Main IPC: G06F13/28
- IPC: G06F13/28 ; G06F13/16 ; G06F13/40

Abstract:
Provided are a memory device and a memory bank comprising a split local data bus, and a segmented global data bus coupled to local data bus. Provided also is a method comprising, receiving a signal from a split local data bus, and transmitting the signal to a segmented global data bus coupled to local data bus. Provided also is a computational device that includes the memory device and the memory bank, and optionally one or more of a display, a network interface, and a battery.
Public/Granted literature
- US09965415B2 DRAM data path sharing via a split local data bus and a segmented global data bus Public/Granted day:2018-05-08
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