Invention Application
- Patent Title: INGAAS EPI STRUCTURE AND WET ETCH PROCESS FOR ENABLING III-V GAA IN ART TRENCH
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Application No.: US15529481Application Date: 2014-12-24
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Publication No.: US20170263706A1Publication Date: 2017-09-14
- Inventor: Sanaz K. GARDNER , Willy RACHMADY , Matthew V. METZ , Gilbert DEWEY , Jack T. KAVALIEROS , Chandra S. MOHAPATRA , Anand S. MURTHY , Nadia M. RAHHAL-ORABI , Nancy M. ZELICK , Tahir GHANI
- Applicant: INTEL CORPORATION
- International Application: PCT/US2014/072396 WO 20141224
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/04 ; H01L29/205 ; H01L29/78 ; H01L29/66 ; H01L21/762

Abstract:
Embodiments of the invention include nanowire and nanoribbon transistors and methods of forming such transistors. According to an embodiment, a method for forming a microelectronic device may include forming a multi-layer stack within a trench formed in a shallow trench isolation (STI) layer. The multi-layer stack may comprise at least a channel layer, a release layer formed below the channel layer, and a buffer layer formed below the channel layer. The STI layer may be recessed so that a top surface of the STI layer is below a top surface of the release layer. The exposed release layer from below the channel layer by selectively etching away the release layer relative to the channel layer.
Public/Granted literature
- US11631737B2 Ingaas epi structure and wet etch process for enabling III-v GAA in art trench Public/Granted day:2023-04-18
Information query
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