Invention Application
- Patent Title: DIFFERENTIAL SG/EG SPACER INTEGRATION WITH EQUIVALENT NFET/PFET SPACER WIDTHS & DUAL RAISED SOURCE DRAIN EXPITAXIAL SILICON AND TRIPLE-NITRIDE SPACER INTEGRATION ENABLING HIGH-VOLTAGE EG DEVICE ON FDSOI
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Application No.: US15711674Application Date: 2017-09-21
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Publication No.: US20180012973A1Publication Date: 2018-01-11
- Inventor: George Robert MULFINGER , Ryan SPORER , Rick J. CARTER , Peter BAARS , Hans-Jürgen THEES , Jan HÖNTSCHEL
- Applicant: GLOBALFOUNDRIES Inc.
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/161 ; H01L29/16 ; H01L27/12 ; H01L21/8238 ; H01L27/092 ; H01L21/84 ; H01L29/78 ; H01L29/08
Abstract:
A method of forming matched PFET/NFET spacers with differential widths for SG and EG structures and a method of forming differential width nitride spacers for SG NFET and SG PFET structures and PFET/NFET EG structures and respective resulting devices are provided. Embodiments include providing PFET SG and EG structures and NFET SG and EG structures; forming a first nitride layer over the substrate; forming an oxide liner; forming a second nitride layer on sidewalls of the PFET and NFET EG structures; removing horizontal portions of the first nitride layer and the oxide liner over the PFET SG and EG structures; forming RSD structures on opposite sides of each of the PFET SG and EG structures; removing horizontal portions of the first nitride layer and the oxide liner over the NFET SG and EG structures; and forming RSD structures on opposite sides of each of the NFET SG and EG structures.
Public/Granted literature
Information query
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