Invention Application
- Patent Title: LOW-DENSITY PARITY CHECK DECODER, A STORAGE DEVICE INCLUDING THE SAME, AND A METHOD
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Application No.: US15652260Application Date: 2017-07-18
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Publication No.: US20180026659A1Publication Date: 2018-01-25
- Inventor: JIYOUP KIM , DONG-MIN SHIN , BEOMKYU SHIN , JUNJIN KONG , HONG RAK SON
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Priority: KR10-2016-0091536 20160719
- Main IPC: H03M13/11
- IPC: H03M13/11 ; G11C29/52 ; G06F11/10
Abstract:
A low-density parity check (LDPC) decoder may include a variable node processing unit and a check node processing unit. The check node processing unit includes memory elements storing a check node value. The memory elements are interconnected through two or more paths, and each of the paths may include a total or partial cyclic permutation of the memory elements to transmit the check node value.
Public/Granted literature
- US10374630B2 Low-density parity check decoder, a storage device including the same, and a method Public/Granted day:2019-08-06
Information query
IPC分类:
