Invention Application
- Patent Title: BONDED SEMICONDUCTOR PACKAGE AND RELATED METHODS
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Application No.: US15285824Application Date: 2016-10-05
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Publication No.: US20180096988A1Publication Date: 2018-04-05
- Inventor: Thomas Fairfax LONG , Jeffrey Peter GAMBINO , Charles Alvah HILL
- Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Applicant Address: US AZ Phoenix
- Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Current Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Current Assignee Address: US AZ Phoenix
- Main IPC: H01L27/06
- IPC: H01L27/06 ; H01L23/00 ; H01L23/31

Abstract:
Implementations of a semiconductor package may include: a first wafer having a first surface and a first set of blade interconnects, the first set of blade interconnects extending from the first surface. The package may include a second wafer having a first surface and a second set of blade interconnects, the second set of blade interconnects extending from the first surface and oriented substantially perpendicularly to a direction of orientation of the first set of blade interconnects. The first set of blade interconnects may be hybrid bonded to the second set of blade interconnects at a plurality of points of intersection between the first and second set of blade interconnects. The plurality of points of intersection may be located along a length of each blade interconnect of the first set of blade interconnects, and along the length of each blade interconnect of the second set of blade interconnects.
Public/Granted literature
- US10748864B2 Bonded semiconductor package and related methods Public/Granted day:2020-08-18
Information query
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