- 专利标题： DEVICES WITH MULTIPLE THRESHOLD VOLTAGES FORMED ON A SINGLE WAFER USING STRAIN IN THE HIGH-K LAYER
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申请号： US15948297申请日： 2018-04-09
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公开(公告)号： US20180226257A1公开(公告)日： 2018-08-09
- 发明人: Takashi Ando , Mohit Bajaj , Terence B. Hook , Rajan K. Pandey , Rajesh Sathiyanarayanan
- 申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
- 主分类号： H01L21/28
- IPC分类号： H01L21/28 ; H01L21/225 ; H01L29/10 ; H01L21/3115 ; H01L21/02 ; H01L29/51 ; H01L29/49 ; H01L21/324 ; H01L29/78 ; H01L29/66 ; H01L27/088 ; H01L21/8234
摘要：
A method for adjusting a threshold voltage includes depositing a strained liner on a gate structure to strain a gate dielectric. A threshold voltage of a transistor is adjusted by controlling an amount of strain in the liner to control an amount of work function (WF) modulating species that diffuse into the gate dielectric in a channel region. The liner is removed.