- 专利标题： TIME BORROWING FLIP-FLOP WITH CLOCK GATING SCAN MULTIPLEXER
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申请号： US15992052申请日： 2018-05-29
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公开(公告)号： US20180278243A1公开(公告)日： 2018-09-27
- 发明人: Amit Agarwal , Steven K. Hsu , Simeon Realov , Ram K. Krishnamurthy
- 申请人： Intel Corporation
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 主分类号： H03K3/3562
- IPC分类号： H03K3/3562 ; H03K19/00 ; H03K19/20
摘要：
An apparatus is provided which comprises: a multiplexer which is gated by a clock; and a flip-flop coupled to the multiplexer, wherein the flip-flop has a chain of at least four inverters one of which has an input to receive the clock.
公开/授权文献
- US10382019B2 Time borrowing flip-flop with clock gating scan multiplexer 公开/授权日：2019-08-13
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