发明申请
- 专利标题: OUTPUT DRIVING CIRCUIT
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申请号: US15858516申请日: 2017-12-29
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公开(公告)号: US20180343008A1公开(公告)日: 2018-11-29
- 发明人: Seung Ho LEE
- 申请人: SK hynix Inc.
- 优先权: KR10-2017-0063919 20170524
- 主分类号: H03K19/003
- IPC分类号: H03K19/003 ; H03K19/00 ; H03K19/017 ; H03K19/177
摘要:
The output driving circuit include a pull-down driver, an input/output (IO) control logic, a gate control logic, and an inverter. The pull-down driver includes first, second, and third transistors that are sequentially coupled between a pad and a ground node. The IO control logic is configured to receive a clock signal and an enable signal, and transfer a first control signal to the third transistor. The gate control logic is configured to receive a voltage of the pad and output a feedback voltage to a gate electrode of the first transistor. The inverter is configured to invert the enable signal and transfer an inverted enable signal to the gate control logic. Therefore, the reliability of the output driving circuit can be improved.
公开/授权文献
- US10348301B2 Output driving circuit 公开/授权日:2019-07-09