Invention Application
- Patent Title: COMBINATION CIRCUITRY FOR MULTIPLE EMBEDDED DISPLAY TRANSMISSION PROTOCOLS
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Application No.: US15641463Application Date: 2017-07-05
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Publication No.: US20190012981A1Publication Date: 2019-01-10
- Inventor: Aruna Kumar L S , Anoop Karunan , Sanjib Basu , Sunil Kumar CR
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: G09G5/00
- IPC: G09G5/00 ; H04L29/06

Abstract:
Embodiments include systems, devices, and methods for a combination CPHY/DPHY/eDP display transmission PHY. A CDE can include a MIPI display serial interface (DSI) circuitry configured to receive 8 bit data compliant with a DSI protocol and output a differential pair signal to a PISO circuit. The same data path is configured for incoming eDP data, which can be routed to circuitry configured to receive 10 bit data compliant with an eDP protocol and output a differential pair signal to a PISO circuit. The system can include a CPHY circuitry that includes a mapper circuit to map a 16 bit input to a 21 bit output, mapper circuit having three 7 bit outputs, and CPHY logic to output a trio. The MUX coupled to an output of the PISO is configured to output one of the eDP or the DSI or the CPHY data to an display driver.
Public/Granted literature
- US10950198B2 Combination circuitry for multiple embedded display transmission protocols Public/Granted day:2021-03-16
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