Invention Application
- Patent Title: Multi-Level Data Block Error Detection Code
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Application No.: US15643550Application Date: 2017-07-07
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Publication No.: US20190013086A1Publication Date: 2019-01-10
- Inventor: Thomas V. Spencer , Ryan James Goss , Mark A. Gaertner
- Applicant: Seagate Technology LLC
- Main IPC: G11C29/52
- IPC: G11C29/52 ; G06F11/20 ; G06F3/06 ; G06F13/16 ; G06F12/02

Abstract:
A data storage system can consist of a number of data storage devices each having a non-volatile memory, a memory buffer, and an error detection module. The memory buffer may store a first data block comprising a front-end first-level error detection code assigned by the error detection module. The non-volatile memory can consist of a second data block having a back-end first-level error detection code and a second-level error detection code each assigned by the error detection module.
Public/Granted literature
- US10176886B1 Multi-level data block error detection code Public/Granted day:2019-01-08
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