-
公开(公告)号:US12086455B2
公开(公告)日:2024-09-10
申请号:US17497573
申请日:2021-10-08
Applicant: Seagate Technology LLC
Inventor: Stacey Secatch , David W. Claude , Daniel J. Benjamin , Thomas V. Spencer , Matthew B. Lovell , Steven Williams , Stephen H. Perlmutter
IPC: G06F3/06
CPC classification number: G06F3/0655 , G06F3/0604 , G06F3/0679
Abstract: A data storage system may have a plurality of memory cells located in different data storage devices that are arranged into a plurality of logical namespaces with each logical namespace configured to be sequentially written and entirely erased as a single unit. An asymmetry strategy may be proactively created with the asymmetry module in response to data access activity to the logical namespaces by the asymmetry module. A new mode, as prescribed by the asymmetry strategy, is entered for at least one logical namespace in response to an operational trigger being met. The new mode changes a timing of at least one queued data access request to at least one logical namespace.
-
公开(公告)号:US11899952B2
公开(公告)日:2024-02-13
申请号:US17515021
申请日:2021-10-29
Applicant: Seagate Technology LLC
Inventor: Ryan James Goss , David W. Claude , Daniel J. Benjamin , Thomas V. Spencer , Matthew B. Lovell
IPC: G06F3/06
CPC classification number: G06F3/0634 , G06F3/0613 , G06F3/0617 , G06F3/0653 , G06F3/0659 , G06F3/0679
Abstract: A system can log data access activity to a memory array with a metadata module while the memory array is logically divided into multiple namespaces. A workload can be determined for each namespace by the metadata module and a metadata strategy can be created with the metadata module in view of the respective namespace workloads. A first metadata and second metadata may be generated for respective first and second user-generated data for storage into a first namespace of the multiple namespaces. The first metadata can be compressed with a compression level prescribed by the metadata strategy in response to a detected or predicted workload to the first namespace before the first metadata, second metadata, first user-generated data, and second user-generated data are each stored in the first namespace.
-
公开(公告)号:US11481342B2
公开(公告)日:2022-10-25
申请号:US16451864
申请日:2019-06-25
Applicant: Seagate Technology LLC
Inventor: Robert Wayne Moss , Michael Shaw , Thomas V. Spencer , Yalan Liu , Sarvani Reddy Kolli
Abstract: A data storage system can organize a semiconductor memory into a first data set and a second data set with a first queue populated with a first data access request from a host. An assignment of an arbitration weight to the first queue with an arbitration circuit corresponds with the first queue being skipped during a deterministic window based on the arbitration weight.
-
公开(公告)号:US10564890B2
公开(公告)日:2020-02-18
申请号:US15643557
申请日:2017-07-07
Applicant: Seagate Technology LLC
Inventor: Matthew Lovell , Thomas V. Spencer , Ryan James Goss
IPC: G06F3/06
Abstract: A data storage system may have a number of data storage devices that each have a non-volatile memory connected to a memory buffer. The memory buffer can consist of a map unit having a predetermined size. In receipt of a data sector into the map unit of the memory buffer, the data sector may be identified as a runt with a runt module connected to the memory buffer and the non-volatile memory. The runt module can generate and subsequently execute a runt handling plan to fill the size of the map unit before storing the filled map unit in the non-volatile memory.
-
公开(公告)号:US20210124525A1
公开(公告)日:2021-04-29
申请号:US16663518
申请日:2019-10-25
Applicant: Seagate Technology LLC
Inventor: Thomas V. Spencer
IPC: G06F3/06 , G06F12/1009 , G06F12/109
Abstract: A data storage device includes a controller configured to recognize commands received from a host as single logical address (LA) commands or multi-LA commands. The data storage drive also includes a command overlap detection table having a plurality of records with each record configured to store multiple unrelated LAs associated with different single LA commands and configured to store multiple related LAs associated with a single multi-LA command.
-
公开(公告)号:US10248357B2
公开(公告)日:2019-04-02
申请号:US15642404
申请日:2017-07-06
Applicant: Seagate Technology LLC
Inventor: Thomas V. Spencer
Abstract: A data storage system may have a first data storage device and a second data storage device connected with a host via a network. The network can consist of a network controller having a message module that generates a buffer progression plan and then assigns a first system message to a first buffer and first computing unit of the first data storage device and assigns a second system message to a second buffer and second computing unit of the second data storage device. The respective first and second computing units may then service the first and second system messages.
-
公开(公告)号:US20190012113A1
公开(公告)日:2019-01-10
申请号:US15642404
申请日:2017-07-06
Applicant: Seagate Technology LLC
Inventor: Thomas V. Spencer
Abstract: A data storage system may have a first data storage device and a second data storage device connected with a host via a network. The network can consist of a network controller having a message module that generates a buffer progression plan and then assigns a first system message to a first buffer and first computing unit of the first data storage device and assigns a second system message to a second buffer and second computing unit of the second data storage device. The respective first and second computing units may then service the first and second system messages.
-
公开(公告)号:US11923026B2
公开(公告)日:2024-03-05
申请号:US17394738
申请日:2021-08-05
Applicant: Seagate Technology LLC
Inventor: Jeremy B. Goolsby , Ryan J. Goss , Indrajit Prakash Zagade , Thomas V. Spencer , Jeffrey J. Pream , Christopher A. Smith , Charles McJilton
CPC classification number: G11C29/42 , G06F11/073 , G06F11/0766 , G06F11/3037 , G11C29/12005 , G11C29/18 , G11C29/4401
Abstract: A data storage system may connect a non-volatile memory to a quarantine module that generates a quarantine strategy in response to a pending data access request to the non-volatile memory. The quarantine strategy can proactively prescribing a plurality of status levels for physical data addresses of the non-volatile memory. A comparison of a volume of errors for the non-volatile memory to a first threshold of the quarantine strategy with the quarantine module may prompt the alteration of a first status level of the plurality of status levels for a first physical data address of the non-volatile memory, as directed by the quarantine strategy.
-
公开(公告)号:US20230305972A1
公开(公告)日:2023-09-28
申请号:US17704553
申请日:2022-03-25
Applicant: Seagate Technology LLC
Inventor: Jon D. Trantham , Steven Scott Williams , Paul M. Wiggins , Thomas V. Spencer
CPC classification number: G06F13/1668 , G06F13/1663 , G06F9/4498 , G06F9/30101
Abstract: An apparatus may include a memory device, a memory controller, or both that can communicate via memory standard interfaces. However, the memory device may have physical memory that does not comply with the memory standard by itself. Disclosed herein are solutions that allow various non-standard types of memory, or emerging memory, to be utilized via a host, microprocessor, or memory controller that implements the interface standard. For example, by utilizing a command converter at the microprocessor and a tunneling register at the memory device, a microprocessor can send commands to the memory device by writing them to the tunneling register, which can then be processed at the memory device for operations to be performed with the non-standard or emerging memory.
-
公开(公告)号:US11294572B2
公开(公告)日:2022-04-05
申请号:US15642413
申请日:2017-07-06
Applicant: Seagate Technology LLC
Inventor: Thomas V. Spencer
IPC: G06F3/06
Abstract: A data storage system may have a number of data storage devices that each have a non-volatile memory connected to different first and second memory buffers. A data storage device can consist of a non-volatile memory where a data sector is stored. A network controller can consist of a buffer module connected to a first memory buffer and a second memory buffer that receives a data read request from the host for the data sector and evaluates the first and second memory buffers as a destination for the data sector after the data sector arrives at the buffer module. The buffer module may choose the first memory buffer and store the data sector in the first memory buffer prior to providing the data sector to the host to satisfy the data read request from the first memory buffer.
-
-
-
-
-
-
-
-
-