Invention Application
- Patent Title: FUNCTIONAL SAFETY ERROR REPORTING AND HANDLING INFRASTRUCTURE
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Application No.: US15818429Application Date: 2017-11-20
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Publication No.: US20190050279A1Publication Date: 2019-02-14
- Inventor: Michael N. Derr , Balaji Vembu , Michael Mishaeli , Brent Chartrand , Bryan R. White , Gustavo Espinosa , Prashant D. Chaudhari
- Applicant: Intel Corporation
- Main IPC: G06F11/07
- IPC: G06F11/07

Abstract:
Various systems and methods for error handling are described herein. A system for error reporting and handling includes a common error handler that handles errors for a plurality of hardware devices, where the common error handler is operable with other parallel error reporting and handling mechanisms. The common error handler may be used to receive an error message from a hardware device, the error message related to an error; identify a source of the error message; identify a class of the error; identify an error definition of the error; determine whether the error requires a diagnostics operation as part of the error handling; initiate the diagnostics operation when the error requires the diagnostics operation; and clear the error at the hardware device.
Public/Granted literature
- US10678623B2 Error reporting and handling using a common error handler Public/Granted day:2020-06-09
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