Invention Application
- Patent Title: HYBRID CASCODE CONSTRUCTIONS WITH MULTIPLE TRANSISTOR TYPES
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Application No.: US15701672Application Date: 2017-09-12
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Publication No.: US20190081597A1Publication Date: 2019-03-14
- Inventor: Vibhor Jain , Anthony K. Stamper , Alvin J. Joseph , John J. Pekarik
- Applicant: GLOBALFOUNDRIES Inc.
- Main IPC: H03F1/22
- IPC: H03F1/22 ; H01L27/07 ; H01L27/06 ; H01L27/12 ; H01L29/78 ; H01L27/02 ; H01L29/06

Abstract:
Structures for a cascode integrated circuit and methods of forming such structures. A field-effect transistor of the structure includes a gate electrode finger, a first source/drain region, and a second source/drain region. A bipolar junction transistor of the structure includes a first terminal, a base layer with an intrinsic base portion arranged on the first terminal, and a second terminal that includes one or more fingers arranged on the intrinsic base portion of the base layer. The intrinsic base portion of the base layer is arranged in a vertical direction between the first terminal and the second terminal. The first source/drain region is coupled with the first terminal, and the first source/drain region at least partially surrounds the bipolar junction transistor.
Information query
IPC分类: