- 专利标题: STORAGE SYSTEM WITH RECONFIGURABLE NUMBER OF BITS PER CELL
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申请号: US16370743申请日: 2019-03-29
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公开(公告)号: US20190227751A1公开(公告)日: 2019-07-25
- 发明人: Ali KHAKIFIROOZ , Pranav KALAVADE , Xin GUO , Aliasgar S. MADRASWALA , Bharat M. PATHAK
- 申请人: Intel Corporation
- 主分类号: G06F3/06
- IPC分类号: G06F3/06 ; G11C11/56 ; G11C16/10
摘要:
A memory device is designed to store data in multilevel storage cells (MLC storage cells). The memory device includes a controller that dynamically writes data to the storage cells according to a first MLC density or a second MLC density. The second density is less dense than the first density. For example, the controller can determine to use the first density when there is sufficient write bandwidth to program the storage cells at the first density. When the write throughput increases, the controller can program the same MLC storage cells at the second density instead of the first density, using the same program process and voltage.
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