Invention Application
- Patent Title: SiC SUBSTRATE EVALUATION METHOD AND METHOD FOR MANUFACTURING SiC EPITAXIAL WAFER
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Application No.: US16598486Application Date: 2019-10-10
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Publication No.: US20200116649A1Publication Date: 2020-04-16
- Inventor: Yoshitaka NISHIHARA , Koji KAMEI
- Applicant: SHOWA DENKO K.K.
- Applicant Address: JP Tokyo
- Assignee: SHOWA DENKO K.K.
- Current Assignee: SHOWA DENKO K.K.
- Current Assignee Address: JP Tokyo
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@9184e66
- Main IPC: G01N21/88
- IPC: G01N21/88

Abstract:
In a SiC substrate evaluation method, a bar-shaped stacking fault is observed by irradiating a surface of a SiC substrate before stacking an epitaxial layer with excitation light and extracting light having a wavelength range from equal to or greater than 405 nm and equal to or less than 445 nm among photoluminescence light beams emitted from the first surface.
Public/Granted literature
- US10697898B2 SiC substrate evaluation method and method for manufacturing SiC epitaxial wafer Public/Granted day:2020-06-30
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