- 专利标题: REDUCTION OF SIDEWALL NOTCHING FOR HIGH ASPECT RATIO 3D NAND ETCH
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申请号: US16165471申请日: 2018-10-19
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公开(公告)号: US20200126804A1公开(公告)日: 2020-04-23
- 发明人: Nikhil Dole , Takumi Yanagawa , Anqi Song
- 申请人: Lam Research Corporation
- 主分类号: H01L21/311
- IPC分类号: H01L21/311 ; H01L21/3213 ; H01L21/02 ; H01L21/67
摘要:
Methods and apparatus for etching a high aspect ratio feature in a stack on a substrate are provided. The feature may be formed in the process of forming a 3D NAND device. Typically, the stack includes alternating layers of material such as silicon oxide and silicon nitride or silicon oxide and polysilicon. WF6 is provided in the etch chemistry, which substantially reduces or eliminates problematic sidewall notching. Advantageously, this improvement in sidewall notching does not introduce other tradeoffs such as increased bowing, decreased selectivity, increased capping, or decreased etch rate.
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