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公开(公告)号：US10741407B2
公开(公告)日：2020-08-11
申请号：US16165471
申请日：2018-10-19
发明人： Nikhil Dole , Takumi Yanagawa , Anqi Song
IPC分类号： H01L21/02 , H01L21/311 , H01L21/3213 , H01L21/67 , H01L27/115
摘要： Methods and apparatus for etching a high aspect ratio feature in a stack on a substrate are provided. The feature may be formed in the process of forming a 3D NAND device. Typically, the stack includes alternating layers of material such as silicon oxide and silicon nitride or silicon oxide and polysilicon. WF6 is provided in the etch chemistry, which substantially reduces or eliminates problematic sidewall notching. Advantageously, this improvement in sidewall notching does not introduce other tradeoffs such as increased bowing, decreased selectivity, increased capping, or decreased etch rate.
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公开(公告)号：US20200126804A1
公开(公告)日：2020-04-23
申请号：US16165471
申请日：2018-10-19
发明人： Nikhil Dole , Takumi Yanagawa , Anqi Song
IPC分类号： H01L21/311 , H01L21/3213 , H01L21/02 , H01L21/67
摘要： Methods and apparatus for etching a high aspect ratio feature in a stack on a substrate are provided. The feature may be formed in the process of forming a 3D NAND device. Typically, the stack includes alternating layers of material such as silicon oxide and silicon nitride or silicon oxide and polysilicon. WF6 is provided in the etch chemistry, which substantially reduces or eliminates problematic sidewall notching. Advantageously, this improvement in sidewall notching does not introduce other tradeoffs such as increased bowing, decreased selectivity, increased capping, or decreased etch rate.
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公开(公告)号：US12020944B2
公开(公告)日：2024-06-25
申请号：US17289603
申请日：2019-10-29
发明人： Nikhil Dole , Takumi Yanagawa
IPC分类号： H01L21/311 , C23C16/455 , C23C16/56 , H01J37/32
CPC分类号： H01L21/31116 , C23C16/45542 , C23C16/56 , H01J37/32082 , H01J37/32449 , H01J37/32834 , H01L21/31144 , H01J2237/2001 , H01J2237/332 , H01J2237/334
摘要： A method of etching features in a stack comprising a dielectric material on a substrate is provided. In a step (a) an etch plasma is generated from an etch gas, exposing the stack to the etch plasma, and partially etching features in the stack. In a step (b) after step (a) an atomic layer deposition process is provided to deposit a protective film on sidewalls. The atomic layer deposition process comprises a plurality of cycles, wherein each cycle comprises exposing the stack to a first reactant gas comprising WF6, wherein the first reactant gas is adsorbed onto the stack and exposing the stack to a plasma formed from a second reactant gas, wherein the plasma formed from the second reactant gas reacts with the adsorbed first reactant gas to form the protective film over the stack. In a step (c) steps (a)-(b) are repeated at least one time.
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公开(公告)号：US20230260798A1
公开(公告)日：2023-08-17
申请号：US18003146
申请日：2022-05-24
发明人： Nikhil Dole , Takumi Yanagawa
IPC分类号： H01L21/311 , H01L21/3213 , C09K13/00
CPC分类号： H01L21/31116 , H01L21/31144 , H01L21/32137 , H01L21/32139 , C09K13/00
摘要： Various embodiments herein relate to methods and apparatus for etching a memory hole in a stack of materials on a substrate. In some cases, the stack includes alternating layers of silicon oxide and silicon nitride. In other cases, the stack includes alternating layers of silicon oxide and polysilicon. In either case, three or more sets of processing conditions are used to etch the substrate. Various processing conditions such as the composition of a reactant mixture, pressure, substrate temperature, and/or plasma generation conditions are varied between the three or more sets of processing conditions to produce high quality etching results with high selectivity, a highly vertical etch profile, and a low degree of bowing.
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公开(公告)号：US10861708B2
公开(公告)日：2020-12-08
申请号：US16691125
申请日：2019-11-21
发明人： Takumi Yanagawa , Nikhil Dole , Ranadeep Bhowmick , Eric Hudson , Felix Leib Kozakevich , John Holland , Alexei Marakhtanov , Bradford J. Lyndaker
IPC分类号： H01J37/32 , H01L21/311 , H01L21/3065
摘要： Systems and methods for applying three or more states for achieving a high aspect ratio dielectric etch operation are described. In one of the methods, a middle state is introduced between a high state and a low state. The middle state is applied to both a source radio frequency (RF) generator and a bias radio frequency (RF) generator. During the middle state, RF power is maintained to be between a high amount of RF power associated with the high state and a low amount of RF power associated with the low state to achieve the high aspect ratio dielectric etch.
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公开(公告)号：US20200090948A1
公开(公告)日：2020-03-19
申请号：US16691125
申请日：2019-11-21
发明人： Takumi Yanagawa , Nikhil Dole , Ranadeep Bhowmick , Eric Hudson , Felix Leib Kozakevich , John Holland , Alexei Marakhtanov , Bradford J. Lyndaker
IPC分类号： H01L21/311 , H01J37/32
摘要： Systems and methods for applying three or more states for achieving a high aspect ratio dielectric etch operation are described. In one of the methods, a middle state is introduced between a high state and a low state. The middle state is applied to both a source radio frequency (RF) generator and a bias radio frequency (RF) generator. During the middle state, RF power is maintained to be between a high amount of RF power associated with the high state and a low amount of RF power associated with the low state to achieve the high aspect ratio dielectric etch.
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公开(公告)号：US20240120209A1
公开(公告)日：2024-04-11
申请号：US18011837
申请日：2021-12-22
发明人： Nikhil Dole , Takumi Yanagawa , Eric A. Hudson , Merrett Wong , Aniruddha Joi
IPC分类号： H01L21/311 , H01J37/32 , H01L21/3213 , H01L21/67
CPC分类号： H01L21/31116 , H01J37/32082 , H01J37/32449 , H01L21/32137 , H01L21/67069 , H01L21/67253 , H01J2237/327 , H01J2237/3341
摘要： A method for etching a stack is described. The method includes etching a first nitrogen-containing layer of the stack by applying a non-metal gas and discontinuing the application of the non-metal gas upon determining that a first oxide layer is reached. The first oxide layer is under the first nitrogen-containing layer. The method further includes etching the first oxide layer by applying a metal-containing gas. The application of the metal-containing gas is discontinued upon determining that a second nitrogen-containing layer will be reached. The second nitrogen-containing layer is situated under the first oxide layer. The method includes etching the second nitrogen-containing layer by applying the non-metal gas.
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公开(公告)号：US20230063007A1
公开(公告)日：2023-03-02
申请号：US17797669
申请日：2021-02-02
发明人： John Holland , Stephan K. Piotrowski , Jaewon Kim , Pratik Mankidy , Takumi Yanagawa , Dongjun Wu , Anthony De La Llera , Zehua Jin
IPC分类号： H01J37/32
摘要： A plasma lining structure is used in a process chamber to block direct line-of-sight for plasma generated within to grounded surface. The plasma lining structure includes a plurality of sections to cover at least one or more portions of an inside surface of a plasma confinement structure disposed in the process chamber. The sections of the plasma lining structure are positioned between a plasma region and the sidewall of the plasma confinement structure, when the plasma lining structure and the plasma confinement structure are disposed in the plasma chamber, such that the sections directly face the plasma region.
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公开(公告)号：US20200090945A1
公开(公告)日：2020-03-19
申请号：US16688639
申请日：2019-11-19
发明人： Nikhil Dole , Takumi Yanagawa
IPC分类号： H01L21/311 , H01J37/32 , H01J37/20 , H01L21/3213
摘要： Various embodiments herein relate to methods and apparatus for etching a feature in a substrate. Often, the feature is etched in the context of forming a DRAM device. The feature is etched in dielectric material, which often includes silicon oxide. The feature is etched using chemistry that includes WF6. Although WF6 is commonly used as a deposition gas (e.g., to deposit tungsten-containing film), it can also be used during etching. Advantageously, the inclusion of WF6 in the etch chemistry can increase the etch rate of the dielectric material, as well as increase the selectivity of the etch. Unexpectedly, these benefits can be realized without any increase in capping.
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公开(公告)号：US20190393047A1
公开(公告)日：2019-12-26
申请号：US16019330
申请日：2018-06-26
发明人： Nikhil Dole , Takumi Yanagawa
IPC分类号： H01L21/311 , H01L21/3213 , H01J37/20 , H01J37/32
摘要： Various embodiments herein relate to methods and apparatus for etching a feature in a substrate. Often, the feature is etched in the context of forming a DRAM device. The feature is etched in dielectric material, which often includes silicon oxide. The feature is etched using chemistry that includes WF6. Although WF6 is commonly used as a deposition gas (e.g., to deposit tungsten-containing film), it can also be used during etching. Advantageously, the inclusion of WF6 in the etch chemistry can increase the etch rate of the dielectric material, as well as increase the selectivity of the etch. Unexpectedly, these benefits can be realized without any increase in capping.
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