Invention Application
- Patent Title: HIGH VERTEX COUNT GEOMETRY WORK DISTRIBUTION FOR MULTI-TILE GPUS
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Application No.: US16208715Application Date: 2018-12-04
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Publication No.: US20200175643A1Publication Date: 2020-06-04
- Inventor: TRAVIS SCHLUESSLER , ZACK WATERS , MICHAEL APODACA , JASON SURPRISE , PETER DOYLE
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: G06T1/20
- IPC: G06T1/20 ; G06F9/50

Abstract:
Embodiments described herein provide data processing device comprising a processor, a memory, and a large draw monitor comprising a processing unit to determine whether a vertex count for a graphics workload exceeds a threshold value, and in response to a determination that the vertex count for the graphics workload exceeds the threshold value, to divide the graphics workload over graphics processing units instantiated on multiple separate tiles. Other embodiments may be described and claimed.
Public/Granted literature
- US10733693B2 High vertex count geometry work distribution for multi-tile GPUs Public/Granted day:2020-08-04
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