Invention Application
- Patent Title: SEMICONDUCTOR DEVICE INCLUDING GATE ELECTRODE FOR APPLYING TENSILE STRESS TO SILICON SUBSTRATE, AND METHOD OF MANUFACTURING THE SAME
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Application No.: US16835661Application Date: 2020-03-31
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Publication No.: US20200227557A1Publication Date: 2020-07-16
- Inventor: Hirokazu SAYAMA , Kazunobu OHTA , Hidekazu ODA , Kouhei SUGIHARA
- Applicant: RENESAS ELECTRONICS CORPORATION
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@680a33bf
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/265 ; H01L21/3215 ; H01L21/8238 ; H01L21/8234 ; H01L29/66 ; H01L27/108 ; H01L27/11 ; H01L29/49

Abstract:
A gate insulating film and a gate electrode of non-single crystalline silicon for forming an nMOS transistor are provided on a silicon substrate. Using the gate electrode as a mask, n-type dopants having a relatively large mass number (70 or more) such as As ions or Sb ions are implanted, to form a source/drain region of the nMOS transistor, whereby the gate electrode is amorphized. Subsequently, a silicon oxide film is provided to cover the gate electrode, at a temperature which is less than the one at which recrystallization of the gate electrode occurs. Thereafter, thermal processing is performed at a temperature of about 1000° C., whereby high compressive residual stress is exerted on the gate electrode, and high tensile stress is applied to a channel region under the gate electrode. As a result, carrier mobility of the nMOS transistor is enhanced.
Information query
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