A semiconductor memory device includes a memory transistor, a word line, a peripheral circuit, and electrodes connected to the peripheral circuit. In response to a write command via the electrodes, the peripheral circuit can execute a first program operation of applying a first program voltage to the word line one time when the write command is one of an n1-th write command to an n2-th write command corresponding to the memory transistor; and execute a second program operation of applying a second program voltage to the first word line at least one time when the write command is one of an (n2+1)-th write command to an n3-th write command corresponding to the memory transistor. The second program voltage in a k-th second program operation is less than the first program voltage in a k-th first program operation.