- 专利标题： METHOD AND APPARATUS TO ENABLE A CACHE (DEVPIC) TO STORE PROCESS SPECIFIC INFORMATION INSIDE DEVICES THAT SUPPORT ADDRESS TRANSLATION SERVICE (ATS)
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申请号： US17473468申请日： 2021-09-13
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公开(公告)号： US20210406195A1公开(公告)日： 2021-12-30
- 发明人: Rupin Vakharwala , Vedvyas Shanbhogue
- 申请人： Rupin Vakharwala , Vedvyas Shanbhogue
- 申请人地址： US OR Hillsboro; US TX Austin
- 专利权人： Rupin Vakharwala,Vedvyas Shanbhogue
- 当前专利权人： Rupin Vakharwala,Vedvyas Shanbhogue
- 当前专利权人地址： US OR Hillsboro; US TX Austin
- 主分类号： G06F12/1027
- IPC分类号： G06F12/1027 ; G06F13/16 ; G06F13/42
摘要：
Embodiments described herein may include apparatus, systems, techniques, or processes that are directed to PCIe Address Translation Service (ATS) to allow devices to have a DevTLB that caches address translation (per page) information in conjunction with a Device ProcessInfoCache (DevPIC) that will store process specific information. Other embodiments may be described and/or claimed.
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