Structures and methods that include a device such as a gate-all-around transistor formed on a frontside and a contact to one terminal of the device from the frontside of the structure and one terminal of the device from the backside of the structure. The backside contact may include selectively etching from the backside a first trench extending to expose a first source/drain structure and a second trench extending to a second source/drain structure. A conductive layer is deposited in the trenches and patterned to form a conductive via to the first source/drain structure.