Invention Application
- Patent Title: TRANSISTOR CONTACT AREA ENHANCEMENT
-
Application No.: US17589831Application Date: 2022-01-31
-
Publication No.: US20220157984A1Publication Date: 2022-05-19
- Inventor: Rishabh MEHANDRU , Tahir GHANI , Stephen CEA
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/06 ; H01L29/08 ; H01L29/10 ; H01L29/417 ; H01L29/66

Abstract:
A semiconductor device includes a semiconductor body that includes a surface and a first region and a second region formed in the semiconductor body, where a channel region is located between the first region and the second region, and where the second region includes a sub-region that includes a blanket dopant; a first conductive contact on the surface of the semiconductor body above the first region; a semiconductor-on-insulator (SOI) at a bottom of the first region; and a pocket channel dopant (PCD) formed in the channel, where a first portion of the PCD is adjacent to a first portion of the SOI; and a second conductive contact on a bottom portion of the sub-region, where a first portion of the second conductive contact is adjacent to a second portion of the SOI, and a second portion of the second conductive contact is adjacent to a second portion of the PCD.
Public/Granted literature
- US11843052B2 Transistor contact area enhancement Public/Granted day:2023-12-12
Information query
IPC分类: