Invention Application
- Patent Title: SEMICONDUCTOR APPARATUS EXAMINATION METHOD AND SEMICONDUCTOR APPARATUS EXAMINATION APPARATUS
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Application No.: US17607155Application Date: 2020-05-19
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Publication No.: US20220207710A1Publication Date: 2022-06-30
- Inventor: Hirotoshi TERADA , Yoshitaka IWAKI
- Applicant: HAMAMATSU PHOTONICS K.K.
- Applicant Address: JP Hamamatsu-shi, Shizuoka
- Assignee: HAMAMATSU PHOTONICS K.K.
- Current Assignee: HAMAMATSU PHOTONICS K.K.
- Current Assignee Address: JP Hamamatsu-shi, Shizuoka
- Priority: JP2019-128344 20190710
- International Application: PCT/JP2020/019811 WO 20200519
- Main IPC: G06T7/00
- IPC: G06T7/00 ; G06T7/70 ; G06T11/00

Abstract:
A semiconductor apparatus examination method includes a step of detecting light from a plurality of positions in a semiconductor apparatus (D) and acquiring a waveform corresponding to each of the plurality of positions, a step of extracting a waveform corresponding to a specific timing from the waveform corresponding to each of the plurality of positions and generating an image corresponding to the specific timing based on the extracted waveform, and a step of extracting a feature point based on a brightness distribution correlation value in the image corresponding to the specific timing and identifying a position of a drive element in the semiconductor apparatus based on the feature point.
Public/Granted literature
- US11967061B2 Semiconductor apparatus examination method and semiconductor apparatus examination apparatus Public/Granted day:2024-04-23
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