Invention Application
- Patent Title: DESIGN-ASSISTED INSPECTION FOR DRAM AND 3D NAND DEVICES
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Application No.: US17722710Application Date: 2022-04-18
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Publication No.: US20220245791A1Publication Date: 2022-08-04
- Inventor: Junqing Huang , Hucheng Lee , Sangbong Park , Xiaochun Li
- Applicant: KLA CORPORATION
- Applicant Address: US CA Milpitas
- Assignee: KLA CORPORATION
- Current Assignee: KLA CORPORATION
- Current Assignee Address: US CA Milpitas
- Main IPC: G06T7/00
- IPC: G06T7/00 ; H01L27/108 ; H01L27/11556 ; G06T7/11 ; G01N21/95 ; G01N21/956 ; H01L27/11582

Abstract:
With the disclosed systems and methods for DRAM and 3D NAND inspection, an image of the wafer is received based on the output for an inspection tool. Geometric measurements of a design of a plurality of memory devices on the wafer are received. A care area with higher inspection sensitivity is determined based on the geometric measurements.
Public/Granted literature
- US11783470B2 Design-assisted inspection for DRAM and 3D NAND devices Public/Granted day:2023-10-10
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