- 专利标题: UART AGGREGATION AND JTAG SELECTION CIRCUITRY FOR A MULTI-SOLID STATE DRIVE ENVIRONMENT
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申请号: US17169062申请日: 2021-02-05
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公开(公告)号: US20220253395A1公开(公告)日: 2022-08-11
- 发明人: Lock Duc Nguyen , Akshay Ganesh , Priyadarsini Lanka , Ping Zheng , Xiaofang Chen
- 申请人: SK hynix Inc.
- 申请人地址: KR Icheon-si
- 专利权人: SK hynix Inc.
- 当前专利权人: SK hynix Inc.
- 当前专利权人地址: KR Icheon-si
- 主分类号: G06F13/38
- IPC分类号: G06F13/38 ; G06F13/40 ; H03K19/173
摘要:
An adaptor device includes a first interface for coupling to a first processor, a second interface for coupling to a second processor, the second interface being different than the first interface, and a plurality of third interfaces, which are different than either the first interface or the second interface. The plurality of third interfaces are configured for coupling to a corresponding plurality of external devices. The adaptor device is configured to receive, at the first interface, a first signal from the first processor. In response to the first signal, the adaptor device couples through the plurality of third interfaces to the plurality of external devices to enable the first processor substantially concurrent access to the plurality of external devices. The adaptor device is also configured to receive, at the first interface, a second signal from the first processor. In response to the second signal, the adaptor device couples the second processor with a selected one of the plurality of external devices.
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