- 专利标题: POWER SEMICONDUCTOR DEVICE HAVING A STRUCTURED METALLIZATION LAYER
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申请号: US17825043申请日: 2022-05-26
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公开(公告)号: US20220285149A1公开(公告)日: 2022-09-08
- 发明人: Ravi Keshav Joshi , Andreas Behrendt , Richard Gaisberger , Anita Satz , Johanna Schlaminger , Johann Schmid , Mario Stanovnik , Juergen Steinbrenner
- 申请人: Infineon Technologies Austria AG
- 申请人地址: AT Villach
- 专利权人: Infineon Technologies Austria AG
- 当前专利权人: Infineon Technologies Austria AG
- 当前专利权人地址: AT Villach
- 主分类号: H01L21/02
- IPC分类号: H01L21/02 ; H01L21/768 ; H01L23/528 ; H01L21/306 ; H01L21/3213
摘要:
Described herein are a method and a power semiconductor device produced by the method. The power semiconductor device includes: transistor device structures formed in a semiconductor substrate; a structured metallization layer above the semiconductor substrate; a first passivation over the structured metallization layer; a second passivation on the first passivation; an opening in the first passivation and the second passivation such that a first part of the structured metallization layer has a contact region uncovered by the first passivation and the second passivation and a peripheral region laterally surrounding the contact region and covered by the first passivation and the second passivation; a plating that covers the contact region but not the peripheral region of the first part of the structured metallization layer; and a protective layer separating the peripheral region of the first part of the structured metallization layer from the first passivation.
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