Invention Application
- Patent Title: DYNAMIC SYSTEM POWER LOAD MANAGEMENT
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Application No.: US17217353Application Date: 2021-03-30
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Publication No.: US20220318056A1Publication Date: 2022-10-06
- Inventor: Nicholas Penha MALAYA , Stephen KUSHNIR , William C. BRANTLEY , Joseph L. GREATHOUSE
- Applicant: ADVANCED MICRO DEVICES, INC. , ATI TECHNOLOGIES ULC
- Applicant Address: US CA Santa Clara; CA Markham
- Assignee: ADVANCED MICRO DEVICES, INC.,ATI TECHNOLOGIES ULC
- Current Assignee: ADVANCED MICRO DEVICES, INC.,ATI TECHNOLOGIES ULC
- Current Assignee Address: US CA Santa Clara; CA Markham
- Main IPC: G06F9/48
- IPC: G06F9/48 ; G06F1/28 ; G06F9/50 ; G06F1/329 ; G06F1/324
Abstract:
A method for reducing power variations resulting from changes in processor workload includes communicating a power dip condition to a workload scheduler of a processor device in response to identifying the power dip condition. One or more target power workloads are assigned for execution at the processor device based at least in part on the power dip condition. Further, each of the one or more target power workloads is associated with a known power load.
Information query
