Invention Application
- Patent Title: THRESHOLD VOLTAGE DETERMINATION FOR CALIBRATING VOLTAGE BINS OF A MEMORY DEVICE
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Application No.: US17233317Application Date: 2021-04-16
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Publication No.: US20220334752A1Publication Date: 2022-10-20
- Inventor: Kishore Kumar MUCHHERLA , Sampath K RATNAM , Shane NOWELL , Peter FEELEY , Sivagnanam Parthasarathy , Mustafa N Kaynak
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee Address: US ID Boise
- Main IPC: G06F3/06
- IPC: G06F3/06

Abstract:
A processing device of a memory sub-system is configured to identify a plurality of blocks assigned to a first voltage bin of a plurality of voltage bins of a memory device; identify a subset of the plurality of blocks having a time after program (TAP) within a predetermined threshold period of time from a second TAP associated with a transition boundary between the first voltage bin and a subsequent voltage bin of the plurality of voltage bins; determine a threshold voltage offset associated with the subset of blocks; and associate the threshold voltage offset with the subsequent voltage bin.
Public/Granted literature
- US11675529B2 Threshold voltage determination for calibrating voltage bins of a memory device Public/Granted day:2023-06-13
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